Nonvolatile Memory Device Fabrication with Trench Voids
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Solution Overview
Problem
The shrinking of memory cell size in nonvolatile memory integrated circuit devices leads to increased coupling and dispersion of cells along bit lines, making it difficult to read memory cells effectively, especially in high-capacity and highly integrated information communication devices.
Innovation Solution
A method of fabricating nonvolatile memory devices involves forming trenches in a substrate with sacrificial and insulating layers, selectively removing the sacrificial layer to create gap regions, and maintaining the insulating layer to improve device isolation and reduce cell dispersion, thereby enhancing reading reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell size is shrunk to increase capacity and integration, then storage capacity and integration density are improved, but cell coupling and dispersion increase making reading difficult
Solution Approach 1:
The substrate is divided into first and second device regions with different trench structures. The first device region contains memory cell transistors with gap regions (voids) between active regions, while the second device region contains select transistors with insulating layers filling trenches. This segmentation allows different functional requirements to be met in different regions, resolving the contradiction between high-density storage and reliable reading.
Solution Approach 2:
Different structural qualities are applied to different regions: the first device region has gap regions (voids) between memory cell active regions to reduce coupling and improve reading, while the second device region has insulating layers for proper transistor operation. This local differentiation allows each region to have optimized properties for its specific function, resolving the reading reliability issue while maintaining high integration.
2Productivity
If memory cell size is reduced to increase integration, then device density is improved, but coupling between cells increases
Solution Approach 1:
Material is extracted from the trenches in the first device region to form gap regions (voids) between active regions. This removal of material creates physical separation spaces that reduce electromagnetic coupling between adjacent memory cells, allowing higher integration density without excessive coupling interference.
Solution Approach 2:
The solution introduces vertical dimensionality by creating deep trenches and gap regions between active regions. The gap regions extend vertically between adjacent memory cell active regions, providing three-dimensional isolation that effectively reduces coupling while maintaining planar integration density.
3Reliability
If gap regions are formed in first device region to reduce dispersion, then reading reliability is improved, but device structure complexity increases
Solution Approach 1:
Sacrificial layers are formed in the trenches during the fabrication process, which are later selectively removed to create gap regions. This preliminary placement of sacrificial material simplifies the overall process by enabling gap formation through selective removal rather than requiring complex direct void creation techniques.
Solution Approach 2:
Sacrificial layers serve as intermediary materials that facilitate the creation of gap regions. These temporary structures are formed during fabrication and then selectively removed to create the desired void spaces, acting as a mediator that simplifies the manufacturing process while achieving the complex structural outcome.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability of nonvolatile memory devices by maintaining sufficient space between memory cells, reducing dispersion, and facilitating better read operations in high-capacity and integrated devices.
Implementation Method 1
The sacrificial layer may be a material having an etching selectivity to that of the insulating layer, and may be selectively removed by selectively etching the sacrificial layer to expose sidewalls of the trenches to define the gap regions
Data Source
AI summary
A method of fabricating a nonvolatile memory device includes forming trenches in a substrate defining device isolation regions therein and active regions therebetween. The trenches and the active regions therebetween extend into first and second device regions of the substrate. A sacrificial layer is formed in the trenches between the active regions in the first device region, and an insulating layer is formed to substantially fill the trenches between the active regions in the second device region. At least a portion of the sacrificial layer in the trenches in the first device region is selectively removed to define gap regions extending along the trenches between the active regions in the first device region, while substantially maintaining the insulating layer in the trenches between the active regions in the second device region. Related methods and devices are also discussed.


