Nonvolatile Memory On-Chip Valley Search Read Level Adjustment

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Solution Overview

Problem

Nonvolatile memory devices face challenges in correcting errors due to severe memory cell degradation, where conventional error correction codes are insufficient, leading to uncorrectable errors during read operations.

Innovation Solution

The implementation of a reading method and controller that perform an on-chip valley search (OVS) operation to detect optimal read levels, allowing for a second page read operation with adjusted read levels based on detection information from the first page OVS, reducing the probability of error occurrence and improving error correction rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional error correction codes are used for reading data from degraded memory cells, then the error correction process is simple and fast, but the error correction rate decreases when memory cells are severely degraded

Engineering Contradiction:
Improveerror correction rateVSAvoidreading operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs an on-chip valley search (OVS) operation as a preliminary step before the actual read operation. This OVS operation detects the optimal read level by searching for the valley point in the threshold voltage distribution, and this detected read level is then used for the subsequent read operation, improving error correction capability for degraded memory cells

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory device performs the valley search operation internally on-chip using its own resources without requiring external intervention. The detection information obtained from the OVS operation is used to automatically adjust the read level for correcting errors in severely degraded memory cells

Inventive Principle:
Principle #25Self-service

2Reliability

If a read retry operation with different sensing schemes is performed to correct errors in severely degraded memory cells, then the error correction capability is improved, but the reading time increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidreading time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The valley search operation is performed in advance before the actual read operation to detect and store the optimal read level. When a read operation is subsequently performed, the stored read level is used directly, avoiding the need for time-consuming retry operations with different sensing schemes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from the valley search operation to dynamically adjust the read level. The detection information from OVS provides feedback about the actual threshold voltage distribution, which is then used to optimize the read operation and avoid unnecessary retry operations

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11682467B2Nonvolatile memory device, controller for controlling the same, storage device including the same, and reading method of the same
Publication Date: 2023.06.20 SAMSUNG ELECTRONICS CO LTD
  • US11682467B2 patent drawing
  • US11682467B2 patent drawing
  • US11682467B2 patent drawing

AI summary

A nonvolatile memory device includes a plurality of memory blocks and a control logic circuit configured to perform a first page on-chip valley search (OVS) operation on memory cells connected to one wordline of a memory block selected in response to an address, among the plurality of memory blocks, in response to a first read command. The control logic circuit is further configured to change a read level of at least one state using detection information of the first page OVS operation, and to perform a second page read operation on the memory cells using the changed read level in response to a second read command.