Non-volatile Memory with Volatile Erasure for Power Loss Security

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Non-volatile memory devices, when used in applications previously served by volatile memory, pose security risks due to the potential for unauthorized data access if power is interrupted, as they retain sensitive information even without external power.

Innovation Solution

A memory device configuration where a subset of the non-volatile memory array is designed to behave like volatile memory by erasing or degrading data upon detecting a power loss, utilizing control circuitry and a backup energy storage mechanism to ensure secure data deletion, and optionally using write-once, read-many memory for added security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If non-volatile memory is used to replace volatile memory, then data retention is improved, but security against unauthorized access deteriorates

Engineering Contradiction:
Improvedata retentionVSAvoidunauthorized data access
Core Design Contradiction:
Duration of action of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The memory array is divided into multiple segments or blocks, where only specific segments are configured for volatile-like behavior. This allows selective application of the security feature to certain data regions while maintaining non-volatile storage for other regions, resolving the contradiction between data retention and security.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the memory device are assigned different functional characteristics. Specifically, certain memory locations are configured with volatile-like erasure behavior upon power loss, while other locations maintain standard non-volatile retention. This local differentiation allows the system to achieve both data retention and security requirements in different areas.

Inventive Principle:
Principle #3Local quality

Solution Approach 3:

The system pre-configures specific memory addresses or regions to have volatile-like behavior before data is written. When power is restored, the control circuitry identifies which regions should exhibit volatile characteristics and proactively erases or degrades data in those regions, preventing potential unauthorized access before it can occur.

Inventive Principle:
Principle #10Preliminary action

2Object-affected harmful factors

If control circuitry and backup energy storage are added to enable volatile-like behavior, then security is improved, but device complexity increases

Engineering Contradiction:
Improveunauthorized data accessVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The control circuitry is designed to perform multiple functions: it manages both standard non-volatile memory operations and the special volatile-like erasure function. The backup energy storage mechanism also serves dual purposes by powering the erasure operation and maintaining system state during power transitions. This multi-functionality reduces the need for separate dedicated components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses its own existing resources to achieve the security function. The backup energy storage mechanism draws from the device's internal power management system, and the control circuitry leverages its existing address decoding and data manipulation capabilities to perform the erasure operation, rather than requiring entirely separate external components.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11742028B2Non-volatile memory devices and systems with volatile memory features and methods for operating the same
Publication Date: 2023.08.29 MICRON TECHNOLOGY INC
  • US11742028B2 patent drawing
  • US11742028B2 patent drawing
  • US11742028B2 patent drawing

AI summary

Memory devices, systems including memory devices, and methods of operating memory devices and systems are provided, in which at least a subset of a non-volatile memory array is configured to behave as a volatile memory by erasing or degrading data in the event of a changed power condition such as a power-loss event, a power-off event, or a power-on event. In one embodiment of the present technology, a memory device is provided, comprising a non-volatile memory array, and circuitry configured to store one or more addresses of the non-volatile memory array, to detect a changed power condition of the memory device, and to erase or degrade data at the one or more addresses in response to detecting the changed power condition.