Non-volatile Memory Voltage Linearity via Dynamic Programming
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Solution Overview
Problem
Existing non-volatile memory technologies face challenges in maintaining linearity of accumulated voltages due to resistance drift, which affects the accuracy of reading operations.
Innovation Solution
A method and device for improving linearity of accumulated voltages by erasing memory cells, setting a target memory cell, and gradually increasing programming voltages to adjust threshold voltages, verifying currents to determine target voltages, and using these voltages to program other memory cells, thereby reducing high resistance states and maintaining linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory cells are programmed with fixed operating voltages according to conventional characteristic curves, then the reading operation can be performed, but the linearity of accumulated voltages is reduced due to resistance drift affecting high resistance states
Solution Approach 1:
The patent dynamically adjusts the operating voltage of memory cells based on their resistance states. Instead of using fixed operating voltages VS1 and VS2 as in conventional approaches, the system applies different voltages tailored to each memory cell's actual resistance characteristics. This parameter adaptation compensates for resistance drift and maintains linearity in the accumulated voltage output, directly resolving the contradiction between reliability and measurement precision.
2Quantity of substance
If multiple memory cells are programmed to high resistance states to store data, then data capacity is increased, but the linearity of accumulated voltages is reduced due to process drift and resistance variations
Solution Approach 1:
The patent implements a feedback mechanism where the actual resistance values of memory cells are measured and used to adjust subsequent programming and reading operations. The system monitors the accumulated voltage output and uses this information to refine voltage application in real-time, compensating for process drift and maintaining linearity even when multiple cells are programmed to high resistance states for increased data capacity.
Solution Approach 2:
The system dynamically changes operating parameters (voltages) based on the collective state of memory cells. When multiple cells are programmed to high resistance states, the system adjusts the applied voltages to compensate for the cumulative effect of resistance variations, thereby maintaining linearity in the accumulated voltage output while preserving increased data storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces the number of high resistance states, enhancing the linearity of accumulated voltages and improving the accuracy of reading operations in non-volatile memory systems.
Implementation Method 1
Each of the memory cells includes a charge trap layer
Implementation Method 2
generate a plurality of programming voltages by gradually increasing the initial voltage based on a step value, sequentially performing a plurality of programming operations by the target memory cell according to the programming voltages
Implementation Method 3
three of the work points WP1, WP3, and WP4 correspond to the state of high resistance of the memory cells, and one of the work point WP2 corresponds to the state of low resistance of the memory cells
Data Source
AI summary
A non-volatile memory and its reading method are provided. The reading method includes: erasing a plurality of memory cells in a memory cell string; setting a target memory cell of the memory cells, setting an initial voltage, generating a plurality of programming voltages by gradually increasing the initial voltage based on a step value, sequentially performing a plurality of programming operations by the target memory cell according to the programming voltages, and verifying the target memory cell to obtain a first verifying current during the programming operations; setting a corresponding programming voltage as a target voltage through determining the first verifying current and a first reference current; and performing the programming operations on the memory cells other than the target memory cell according to the target voltage and setting the memory cell string as a reading reference memory cell string.