Nonvolatile Memory Voltage Selector for Common Source Line Noise Control

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Solution Overview

Problem

Three-dimensional nonvolatile memory structures face challenges with higher manufacturing difficulty and unintended noise issues due to varying common source line voltages, which affect performance and reliability.

Innovation Solution

A nonvolatile memory device with a common source line noise control logic circuit that generates multiple voltages, uses a voltage selector to choose the appropriate voltage based on program information, and a common source line driver to control the common source line voltage, ensuring uniform noise levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a three-dimensional memory structure is implemented to increase memory cell density, then the number of memory cells per chip area increases, but unintended noise is generated and manufacturing difficulty increases

Engineering Contradiction:
Improvenumber of memory cellsVSAvoidunintended noise
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the voltage level of the common source line based on program information. The control logic circuit generates multiple voltage levels, and the voltage selector chooses appropriate voltage levels to compensate for noise variations in different memory blocks, thereby reducing unintended noise while maintaining high memory cell density in the three-dimensional structure

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback by using program information to control the voltage selector, which in turn adjusts the common source line voltage. This feedback mechanism allows the system to respond to varying noise conditions in different memory blocks during programming operations, stabilizing the common source line noise and improving overall device performance

Inventive Principle:
Principle #23Feedback

2Quantity of substance

If a three-dimensional memory structure is implemented to increase memory cell density, then the number of memory cells per chip area increases, but manufacturing difficulty increases

Engineering Contradiction:
Improvenumber of memory cellsVSAvoidmanufacturing difficulty
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent applies segmentation by dividing the memory device into multiple memory blocks with individually controllable common source lines. This segmentation allows for localized voltage control and noise management, making the manufacturing and operation of high-density three-dimensional memory structures more manageable and less prone to cumulative errors across the entire chip

Inventive Principle:
Principle #1Segmentation

3Stability of the object's composition

If multiple voltage levels are generated and selected based on program information to control common source line noise, then noise uniformity improves, but device complexity increases

Engineering Contradiction:
Improvenoise uniformityVSAvoiddevice complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent introduces intermediary components (control logic circuit and voltage selector) that mediate between the memory blocks and the common source line. These intermediaries manage the complexity of voltage control by centralizing the voltage selection logic, thereby achieving noise uniformity across memory blocks while containing device complexity in dedicated control circuits rather than distributing it throughout the entire memory array

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12451176B2Nonvolatile memory device and storage device including nonvolatile memory device including a voltage selector
Publication Date: 2025.10.21 SAMSUNG ELECTRONICS CO LTD
  • US12451176B2 patent drawing
  • US12451176B2 patent drawing
  • US12451176B2 patent drawing

AI summary

Disclosed is a nonvolatile memory device including a memory cell array including memory cells, bit lines and word lines connected with the memory cells, a common source line connected with the memory cells, a control logic circuit including a common source line noise control logic circuit and configured to generate voltages including a first voltage and a second voltage, a voltage selector configured to receive the voltages and configured to select at least one of the voltages, and a common source line driver configured to receive the at least one selected voltage and configured to control a voltage of the common source line, and the common source line noise control logic circuit is configured to control the voltage selector based on program information so as to select the at least one of the voltages.