Nonvolatile Memory Wear Equalization via Dynamic Selection Sequences
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Solution Overview
Problem
Nonvolatile semiconductor memory devices with vertically stacked cell strings face issues with uneven wear and tear, leading to differential voltage stresses on memory cells, which can reduce their reliability and lifespan due to fixed selection sequences of string selection lines.
Innovation Solution
A method is introduced to adjust the selection sequence of string selection lines based on wear leveling information, such as erase count, to distribute voltage stresses more evenly across memory cells, using a memory controller with an address remapper to reconfigure the selection sequence when the erase count exceeds a reference value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed selection sequence of string selection lines is used, then the device complexity is reduced and operation is simplified, but uneven wear and voltage stresses occur on memory cells, reducing reliability
Solution Approach 1:
The patent applies dynamics by making the selection sequence of string selection lines variable rather than fixed. The memory controller dynamically adjusts the selection sequence based on wear leveling information, such as erase counts of different memory blocks. This allows the system to adapt to uneven wear patterns and distribute voltage stresses more evenly across memory cells, thereby improving reliability without requiring complex hardware modifications.
Solution Approach 2:
The patent changes the parameter of selection sequence order based on wear leveling status. By monitoring erase counts and other wear indicators, the system modifies which string selection lines are selected and in what order, thereby changing the electrical stress distribution pattern over time. This parameter adjustment equalizes wear across memory blocks and improves overall device reliability.
2Productivity
If memory cells are subjected to differential voltage stresses, then the programming speed may be maintained, but the lifespan of memory devices is reduced due to uneven wear
Solution Approach 1:
The patent implements periodic action by repeatedly adjusting the selection sequence based on accumulated wear leveling information. The memory controller periodically monitors erase counts and modifies the selection pattern to distribute future programming operations more evenly. This periodic rebalancing maintains high programming speed while gradually equalizing wear across all memory blocks, thereby extending device lifespan.
Solution Approach 2:
The system uses feedback from wear leveling information (such as erase counts) to adjust the selection sequence. The memory controller continuously monitors the wear status of different memory blocks and uses this feedback to dynamically modify which string selection lines are activated and in what order. This closed-loop control ensures that programming operations are distributed to minimize differential voltage stresses, maintaining productivity while extending lifespan.
3Duration of action of stationary object
If wear leveling information is used to adjust selection sequence, then the lifespan is extended, but the control mechanism becomes more complex
Solution Approach 1:
The patent introduces an address remapper as an intermediary component between the host interface and the memory cell array. This intermediary translates host addresses into physical addresses while considering wear leveling information and adjusting the selection sequence accordingly. By placing this intelligence in the memory controller rather than in the memory array itself, the patent extends lifespan through sophisticated control while keeping the memory array structure simple and scalable.
Data Source
AI summary
Disclosed is a method for programming a nonvolatile memory device, the nonvolatile memory device including cell strings formed in a direction perpendicular to a substrate, and which selects memory cells by a string selection line unit. The programming method includes detecting wear leveling information of a selected memory block, determining a selection sequence of string selection lines of the selected memory block according to the wear leveling information, and writing data at the selected memory block according to the determined selection sequence.