Non-volatile SRAM Integrating eNVM to Cut Static Power

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Solution Overview

Problem

The von-Neumann bottleneck and intermittent static power consumption in computing devices due to the need for frequent data transfer between memory and processor in traditional SRAM-based systems.

Innovation Solution

A non-volatile static random access memory (NV-SRAM) is developed by integrating a static random access memory (SRAM) with a reading element and a first embedded non-volatile memory (eNVM). The eNVM is connected to the SRAM, allowing for instant data storage and restoration, thereby reducing power consumption and memory writing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If data is transferred frequently between memory and processor in traditional SRAM-based systems, then data processing can be performed, but power consumption increases and the von-Neumann bottleneck occurs

Engineering Contradiction:
Improvepower consumptionVSAvoiddata processing efficiency
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent merges SRAM and eNVM into a unified non-volatile static random access memory structure where the eNVM is electrically connected to the SRAM cell. This integration allows the system to simultaneously achieve fast read access (via SRAM) and non-volatile storage (via eNVM), eliminating the need for frequent data transfers between separate memory and processor units, thereby reducing power consumption while maintaining data processing efficiency

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated memory structure serves multiple functions: the SRAM portion provides fast read access for active computing operations, while the eNVM portion provides non-volatile storage for data persistence. This multi-functionality allows the same memory structure to handle both volatile and non-volatile storage requirements, reducing the need for separate memory components and associated data transfers

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Use of energy by moving object

If eNVM is integrated with SRAM to enable non-volatile characteristics and in-memory computing, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvestatic power consumptionVSAvoidmemory structure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The memory structure is segmented into distinct functional components: SRAM cells for fast access, eNVM elements for non-volatile storage, and reading elements for data retrieval. Each segment performs a specific function, allowing the complex system to be managed through modular design where each component can be optimized independently while contributing to the overall power-efficient operation

Inventive Principle:
Principle #1Segmentation

3Loss of time

If data storage and restoration are performed instantly between SRAM and eNVM, then memory writing time is reduced, but the complexity of data management increases

Engineering Contradiction:
Improvememory writing timeVSAvoiddata management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The system performs preliminary actions by maintaining data in both SRAM and eNVM simultaneously through the electrical connection between them. When data is written to SRAM, it is automatically or pre-synchronized with the eNVM portion, ensuring that data persistence is already established before power shutdown occurs. This eliminates the need for time-consuming post-power-off storage operations

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12224008B2Non-volatile static random access memory
Publication Date: 2025.02.11 NAT CHENG KUNG UNIV
  • US12224008B2 patent drawing
  • US12224008B2 patent drawing
  • US12224008B2 patent drawing

AI summary

A non-volatile static random access memory includes: a static random access memory, a reading element and a first embedded non-volatile memory. The static random access memory includes a first inverter, a second inverter and two transistors, an output terminal of the first inverter and the input terminal of the second inverter are electrically connected to each other to serve as a Q node, an input terminal of the first inverter and an output terminal of the second inverter are electrically connected to each other to serve as a QB node, and the two transistors are electrically connected to the Q node and the QB node, respectively. The reading element is electrically connected to the Q node. The first embedded non-volatile memory is electrically connected to the QB node.