Nonvolatile Machine State Backup for Power Drop Recovery
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Solution Overview
Problem
Existing portable electronic devices face challenges in reducing leakage current during standby power mode, requiring continuous power to retain state information, which is inefficient for battery-operated devices and energy harvesting applications.
Innovation Solution
Implementing non-volatile logic (NVL) within System on Chip (SoC) using ferroelectric random access memory (FRAM) to store state information, allowing complete power removal without data loss, with NVL arrays dispersed throughout the logic cloud and controlled by a central NVL controller for efficient power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shadow latch is used to retain state information during standby power mode, then data retention is improved, but leakage current increases
Solution Approach 1:
The patent extracts the state retention function from the traditional shadow latch circuit and implements it using non-volatile memory cells (FRAM, MRAM, or RRAM). This allows the state information to be retained without requiring continuous power supply to retention circuits, thereby eliminating leakage current while maintaining data retention capability.
Solution Approach 2:
The patent changes the fundamental parameter of state retention from volatile (requiring continuous power) to non-volatile (retaining state without power). By using non-volatile memory cells with different resistance states or magnetic polarization states, the system can retain state information indefinitely without power, completely eliminating the leakage current problem associated with traditional retention latches.
2Reliability
If continuous power is supplied to retain state information, then data retention is improved, but energy consumption increases
Solution Approach 1:
The patent removes the continuous power requirement from state retention by using non-volatile memory cells. These cells can maintain their state (electrical charge, magnetic polarization, or resistance state) without any power supply, thereby eliminating energy consumption for state retention while improving reliability.
Solution Approach 2:
The non-volatile memory cells serve themselves by inherently retaining their state without external power. The physical properties of these cells (ferroelectric polarization, magnetic domain orientation, or resistance state) naturally persist without energy input, making the state retention system self-sufficient and energy-free.
3Loss of energy
If power is completely removed during standby mode, then energy consumption is reduced, but state information is lost
Solution Approach 1:
The patent performs preliminary action by storing state information in non-volatile memory cells before power is completely removed. These cells are designed to retain their state indefinitely without power, so when power is restored, the state information is already preserved and can be quickly restored to the volatile logic circuits without data loss.
4Speed
If traditional volatile memory is used for state retention, then speed is improved, but leakage current increases
Solution Approach 1:
The patent segments the memory system into two distinct parts: volatile logic circuits for fast state access and non-volatile memory cells for state retention. The volatile circuits maintain high-speed operation when powered, while the non-volatile cells handle state persistence without power. This segmentation allows each component to optimize its function without compromise.
Solution Approach 2:
The non-volatile memory cells act as an intermediary between the volatile logic circuits and the power supply. They capture state information from the volatile circuits when powered, retain it without power, and restore it when power returns, thereby mediating the trade-off between speed and leakage current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables zero leakage in sleep mode and rapid system state restoration upon power-up, reducing energy consumption and eliminating the need for constant power sources, ideal for energy harvesting applications and handheld devices with limited resources.
Implementation Method 1
Implementing non-volatile logic (NVL) within System on Chip (SoC) using ferroelectric random access memory (FRAM) to store state information
Data Source
AI summary
Input power quality for a processing device is sensed. In response to detection of poor power quality, input power is disconnected, and the processing device backs up its machine state in non-volatile logic element arrays using available stored charge. When power is restored, the stored machine state is restored from the non-volatile logic element arrays to the volatile logic elements whereby the processing device resumes its process from the state immediately prior to power loss allowing seamless processing across intermittent power supply.