NOR Flash In-Memory Multiply and Accumulate Circuit
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Solution Overview
Problem
In neuromorphic computing and machine learning systems, the complexity of data flow among memory locations for large computations, such as sum-of-products operations, leads to inefficiencies due to the need for extensive data movement operations involving large tensors and numerous weights.
Innovation Solution
The implementation of an in-memory multiply and accumulate function using an array of NOR flash memory cells, where memory cells are programmed with weights and input values are used to generate bias voltages, allowing for current to flow representing the product of weights and inputs, which are then summed to produce an output current, reducing the need for data movement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sum-of-products operations are performed using conventional memory architectures, then computation can be achieved, but data movement complexity increases significantly
Solution Approach 1:
The patent merges the storage function and computation function into a single memory array structure. Weight values are stored directly in the memory cells, and computation is performed by applying voltages to selected word lines and bit lines, allowing the same physical structure to serve both storage and processing purposes, thereby eliminating complex data movement between separate memory and processing units
Solution Approach 2:
The memory array is designed to perform multiple functions: storing weight values, performing analog-to-digital conversion, executing sum-of-products computations, and providing parallel processing capabilities. This multi-functional approach eliminates the need for separate dedicated circuits for each operation, reducing overall system complexity while maintaining high computational efficiency
2Loss of energy
If in-memory computation is implemented using NOR flash memory cells, then data movement is reduced, but programming complexity increases
Solution Approach 1:
The memory cells perform self-service by storing weight values and automatically participating in computation operations when voltage signals are applied. The same memory cells that store data also perform the computation function, eliminating the need for separate processing elements and reducing the energy required for data movement between storage and processing units
Solution Approach 2:
The patent utilizes the threshold voltage parameter of NOR flash memory cells to encode weight values. By programming different threshold voltages into the memory cells, various weight values are represented, and these programmed parameters are then used directly in analog computation operations, allowing the memory cells to serve dual purposes of storage and computation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient in-memory computation by minimizing data movement and optimizing the execution of sum-of-products operations, enhancing the performance of neuromorphic computing and machine learning systems.
Implementation Method 1
applying a word line voltage to the particular word line WLn so that the memory cells on the row conduct current corresponding to a product Wi,n*Xi,n from respective cells in the row
Data Source
AI summary
An in-memory multiply and accumulate circuit includes a memory array, such as a NOR flash array, storing weight values Wi,n. A row decoder is coupled to the set of word lines, and configured to apply word line voltages to select word lines in the set. Bit line bias circuits produce bit line bias voltages for the respective bit lines as a function of input values Xi,n on the corresponding inputs. Current sensing circuits are connected to receive currents in parallel from a corresponding multimember subset of bit lines in the set of bit lines, and to produce an output in response to a sum of currents.