NOR Flash Memory Array PUF Generation with ECC
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Solution Overview
Problem
Current methods for generating unique intrinsic IDs for chips using Physically Unclonable Functions (PUFs) face challenges in minimizing chip overhead while ensuring stability and accuracy in authentication, particularly for fabless semiconductor design companies seeking cost-effective solutions with minimal design and area overhead.
Innovation Solution
A method and system utilizing a NOR type memory array with a random bitmap pattern generated by non-charge-trapped transistors in a charge trap memory array, which provides a simpler and more cost-effective solution compared to SRAM and DRAM based PUFs, incorporating error correction bits for stable PUF generation and secure authentication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SRAM or DRAM based PUFs are used to generate unique intrinsic IDs, then authentication security is improved, but chip area overhead and manufacturing cost increase
Solution Approach 1:
The patent uses standard NOR flash memory cells instead of expensive SRAM or DRAM structures. NOR flash is a mature, low-cost technology that can be manufactured using existing processes without requiring additional expensive memory structures. This replaces costly PUF implementations with affordable commercial memory technology while maintaining the unique fingerprint generation capability through process variations.
Solution Approach 2:
The patent makes the NOR flash memory serve dual purposes: it functions as both the standard storage memory for the device and as the PUF structure for generating unique intrinsic IDs. This eliminates the need for separate dedicated PUF circuitry, as the same memory array that stores data also generates the authentication fingerprint through its inherent process variations, thereby reducing overall chip area overhead.
2Measurement precision
If complex PUF generation circuits are implemented to ensure stable bit pattern generation, then authentication accuracy is improved, but device complexity and manufacturing overhead increase
Solution Approach 1:
The patent employs self-correcting read circuits that automatically detect and correct reading errors during the PUF fingerprint generation process. The circuit monitors its own operation and corrects errors without requiring external intervention or complex additional correction circuits. This self-service approach maintains high authentication accuracy while minimizing added complexity by using simple error detection and correction logic integrated into the existing memory read path.
3Stability of the object's composition
If additional error correction circuits are added to stabilize PUF bit patterns, then authentication stability is improved, but manufacturing yield and simplicity are worsened
Solution Approach 1:
The patent implements a lightweight error correction mechanism that applies just enough correction to stabilize the PUF bit patterns without over-engineering the solution. Rather than adding full-blown error correction codes or complex stabilization circuits, the implementation uses minimal correction logic that handles the most common reading errors effectively. This partial action approach achieves sufficient stability for authentication while keeping the manufacturing process simple and avoiding excessive complexity that would hurt yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high accuracy and security in chip authentication with minimal overhead, enabling dynamic PUF generation and stable bit pattern creation, suitable for a broad range of products with improved hardware security through a low-cost, adaptable design.
Implementation Method 1
Process variations in a VLSI chip can originate unique electrical fingerprints, and these constitute a secure approach to chip security known as Physically Unclonable Functions (PUFs).
Data Source
AI summary
A method for identifying an unclonable chip uses hardware intrinsic keys and authentication responses employing intrinsic parameters of memory cells invariant and unique to the unclonable chip, wherein intrinsic parameters that characterize the chip can extend over its lifetime. The memory cells having a charge-trap behavior are arranged in an NOR type memory array, allowing to create a physically unclonable fuse (PUF) generation using non-programmed memory cells, while stringing non-volatile bits in programmed memory cells. The non-volatile memory cell bits are used for error-correction-code (ECC) for the generated PUF. The invention can further include a public identification using non-volatile bits, allowing hand shaking authentication using computer with dynamic challenge.