NOR Flash Memory Circuit Voltage Control for Short Channel Punch-Through
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional NOR flash memory devices face limitations in reducing the size of memory cells due to channel length restrictions, leading to high power consumption and inefficiency in data writing operations.
Innovation Solution
A NOR flash memory circuit comprising a NOR memory array, source voltage selection unit, well voltage selection unit, word line gating unit, bit line gating unit, and an analog voltage generating unit, which allows for optimized data writing, reading, and erasing by controlling voltages to reduce effective channel length and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If hot carrier injection is used for data writing, then data can be written into the memory cell, but the drain and source will be punched through when the channel is relatively short, limiting the reduction of memory cell area
Solution Approach 1:
The patent changes the voltage parameters applied to the memory cell during writing operations. Instead of conventional hot carrier injection voltages, the invention applies a first voltage to the control gate and a second voltage to the tunnel electrode, creating a controlled electric field that enables electron injection without causing drain-source punch-through. This parameter change allows the channel length to be reduced while maintaining reliability.
Solution Approach 2:
The patent introduces a tunnel electrode as an intermediary element between the control gate and the floating gate. This tunnel electrode acts as a mediator that enables electron injection through a tunneling mechanism rather than hot carrier injection, allowing data writing in short-channel memory cells without the punch-through problem that plagues conventional approaches.
2Area of moving object
If the channel length is reduced to decrease memory cell area, then device size is reduced, but hot carrier injection becomes ineffective due to punch-through
Solution Approach 1:
The patent modifies the voltage parameters and injection mechanism to make data writing effective in short-channel memory cells. By applying specific voltages to the control gate and tunnel electrode, the invention creates conditions for efficient electron injection that do not depend on long channel lengths, thereby maintaining high data writing efficiency while using smaller memory cells.
Solution Approach 2:
The patent replaces the hot carrier injection mechanism with a tunneling-based injection mechanism. Instead of relying on high-energy hot electrons generated by strong electric fields in the channel (mechanical acceleration), the invention uses quantum tunneling through a barrier formed by the tunnel electrode, which is effective in short-channel devices where hot carrier injection fails.
3Productivity
If conventional hot carrier injection is used, then data writing is possible, but power consumption is high due to restrictive process conditions
Solution Approach 1:
The patent changes the voltage parameters and injection timing to reduce power consumption. By applying voltages to the control gate and tunnel electrode in a controlled sequence and using lower overall voltage levels compared to hot carrier injection, the invention achieves effective data writing with reduced energy dissipation.
Solution Approach 2:
The tunnel electrode serves as an energy-efficient intermediary that enables electron injection through tunneling rather than requiring the high-energy hot carrier generation process. This intermediary mechanism reduces the energy required for data writing while maintaining effective data storage capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient data operations, reducing memory cell area, improving efficiency, and lowering power consumption by optimizing voltage control in the NOR flash memory circuit.
Implementation Method 1
The analog voltage generating unit is connected to input terminals of the source voltage selection unit, the well voltage selection unit, the word line gating unit, the bit line gating unit, and the data reading unit, and is configured to generate a forward voltage and a reverse voltage to control the NOR memory array to perform data writing, reading, and erasing
Implementation Method 2
Hot carrier injection refers to a physical process in which, when a bias voltage is applied to the drain of a memory cell and the source is grounded, high-energy hot electrons (>3.2 eV) are accelerated by a transverse electric field and generated in a channel of the memory cell, and then break through an energy barrier under gate-oxide high pressure to enter and to be stored in a floating gate of the memory cell
Data Source
AI summary
The present disclosure relates to a NOR flash memory circuit, a data writing method, a data reading method, and a data erasing method. The NOR flash memory circuit includes: a NOR memory array, a source voltage selection unit, a well voltage selection unit, a word line gating unit, a bit line gating unit, a data reading unit, and an analog voltage generating unit. During data writing, a source is floated, and a well electrode is connected to ground; and a first forward voltage is applied to a bit line where a memory cell to be written data into is located, and a second forward voltage is applied to a word line where the memory cell to be written data into is located. During data reading, a source is grounded, and well electrodes are grounded; and a third forward voltage is applied to a word line.