NOR-Gated Local Access Line Deselect Circuit for 3D Crosspoint Routing
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Solution Overview
Problem
Existing memory systems with dedicated lines for select and deselect devices in 3D crosspoint memory arrays lead to increased routing complexity, area occupation, and power consumption.
Innovation Solution
Utilizing shared control lines for both select and deselect devices in 3D crosspoint memory arrays to simplify routing, reduce driver circuitry, and lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated control lines are used for both select and deselect devices, then device control reliability is improved, but routing complexity and area occupation increase
Solution Approach 1:
The patent combines the control lines for select devices and deselect devices into a single shared control line. The select device and deselect device share the same control line, eliminating the need for separate dedicated lines. This merging approach reduces routing complexity and area occupation while maintaining reliable control through the use of NOR gate logic to ensure proper device activation states.
Solution Approach 2:
The control line is designed to serve multiple functions by controlling both select devices and deselect devices. A single control line performs the universal function of device selection and deselection, reducing the total number of control lines required. The NOR gate circuitry enables this multi-functionality by generating appropriate control signals for both device types from the same input line.
2Manufacturing precision
If dedicated control lines are used for select and deselect devices, then device control precision is improved, but area occupation increases
Solution Approach 1:
The patent merges the control lines for select and deselect devices into a single shared control line, reducing the area required for control line routing. The select device and deselect device share the same physical control line, eliminating redundant routing structures and reducing overall area occupation while maintaining precise device control through NOR gate logic.
3Reliability
If more control lines are used for select and deselect devices, then device control reliability is improved, but power consumption increases
Solution Approach 1:
The patent combines the control lines for select devices and deselect devices into a single shared control line, reducing the total number of active signal lines. This merging reduces capacitive loading and dynamic power consumption associated with charging and discharging multiple separate control lines, while NOR gate logic ensures reliable device control activation.
Data Source
AI summary
A memory device comprising a plurality of first global access lines, second global access lines, first local access lines, and second local access lines; and a plurality of memory cells, wherein a memory cell is coupled to one of the first local access lines and one of the second local access lines. The memory device further comprises a plurality of signal lines to communicate local access line select signals to control a plurality of select devices, wherein a select device selectively couples one of the first global access lines to one of the first local access lines; and a NOR gate to accept the plurality of local access line select signals as inputs and generate a plurality of local access line deselect signals to control a plurality of deselect devices, wherein a deselect device selectively couples one of the first local access lines to a deselect voltage.