Norbornene Polymer Bonding for Residue-Free Chip Stacking
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Solution Overview
Problem
Current methods for chip stacking and wafer thinning lack materials and techniques that provide strong, reworkable bonds with minimal residue, necessary for reducing chip size and increasing functionality while avoiding damage from thermal expansion fluctuations.
Innovation Solution
The use of polymers with a vinyl addition polymer backbone, comprising distinct repeat units from norbornene-type monomers, which form low-stress films capable of high-temperature processing and photodefinition, enabling reliable bonding between electronic devices and substrates with the ability to be readily removed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If chip stacking is implemented to reduce footprint, then device size is reduced, but bonding material removal becomes difficult with significant residue
Solution Approach 1:
The patent applies parameter changes by selecting bonding materials with specific thermal decomposition characteristics. The bonding material is chosen to decompose at temperatures between 400-600°C, transforming its physical state from a solid bond to removable vapor/gas phase, enabling complete removal without residue while maintaining strong bonding at operating temperatures.
Solution Approach 2:
The patent utilizes phase transitions of the bonding material to resolve the contradiction. The bonding material transitions from a solid bonded state at room temperature to a vaporized/removable state at elevated temperatures (400-600°C), allowing the same material to provide both strong bonding and easy removal capabilities through temperature-induced phase change.
2Strength
If strong bonding materials are used for chip stacking, then bond strength is improved, but stress from thermal expansion fluctuations damages chips
Solution Approach 1:
The patent directly addresses thermal expansion effects by selecting bonding materials with coefficients of thermal expansion that match those of the chips and substrates. This parameter matching minimizes differential thermal stress during temperature fluctuations, preventing chip damage while maintaining bond integrity throughout the operating temperature range.
Solution Approach 2:
The patent employs composite material selection, combining bonding materials with specific mechanical and thermal properties. The bonding material is chosen as a composite formulation that simultaneously provides high bond strength, appropriate thermal expansion characteristics, and controlled decomposition behavior, resolving multiple contradictory requirements through material composition design.
3Length of stationary object
If wafer thinning is performed to minimize chip stack height, then stacking density is improved, but bonding material removal leaves residues affecting subsequent processing
Solution Approach 1:
The patent applies parameter changes by controlling the thermal decomposition temperature and atmosphere parameters. The bonding material is formulated to decompose completely at 400-600°C in controlled atmospheres (inert or reducing), transforming into volatile products that evaporate without leaving residues, thereby maintaining surface cleanliness after removal.
Solution Approach 2:
The patent converts the potential harm of bonding material residues into a benefit by selecting materials whose decomposition products are volatile and evaporate cleanly. The decomposition process, which could leave residues, is instead designed to produce gaseous products that completely evaporate, leaving clean surfaces for subsequent processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These polymer compositions achieve strong, stress-free bonds with low dielectric constant and high glass transition temperature, allowing for efficient chip stacking and wafer thinning with minimal residue and enhanced mechanical properties.
Implementation Method 1
bonding materials that can be employed by that method, for attaching each die in such a stack, to the adjacent die
Implementation Method 2
such materials used by such methods should also provide a stress buffer function, where they are used to attach such a chip or chip stack to a substrate having a different coefficient of linear expansion
Data Source
AI summary
Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.