Norbornene Polymer Adhesive for Chip Stacking
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Solution Overview
Problem
Current methods for chip stacking and wafer bonding lack materials that provide strong, reworkable bonds with minimal residue, and are not widely adopted, necessitating the development of alternative materials and methods for both chip stacking and wafer thinning that offer stress buffering and easy release capabilities.
Innovation Solution
The use of polymers with a vinyl addition polymer backbone, comprising distinct repeat units derived from norbornene-type monomers, which form films with low internal stress, are photodefinable, and capable of forming reliable bonds between electronic devices and substrates, allowing for pattern formation and easy removal after bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional adhesive materials are used for chip stacking and wafer bonding, then strong bonds are formed, but the materials leave residues and are difficult to remove
Solution Approach 1:
The patent applies parameter changes by modifying the chemical composition and physical properties of the adhesive material. The polymer-based adhesive with controlled molecular weight, functional groups, and curing characteristics enables the material to provide strong bonding during operation while allowing clean removal through thermal decomposition or chemical processes afterward, thus resolving the contradiction between bond strength and removal ease
Solution Approach 2:
The patent utilizes phase transitions in the adhesive material's lifecycle: the material transitions from a liquid or soft solid state during application to a crosslinked network state during bonding, and can then be reverted to a removable state through thermal or chemical treatment. This phase transition capability allows the material to satisfy both strong bonding and easy removal requirements at different stages
2Area of stationary object
If chip stacking is implemented to reduce footprint, then device size is reduced, but stress management becomes more difficult due to different coefficients of linear expansion
Solution Approach 1:
The patent introduces the polymer-based adhesive material as an intermediary layer between chips and substrates with different thermal expansion coefficients. This intermediary material absorbs and buffers the thermal stress through its viscoelastic properties and stress relaxation mechanisms, preventing stress transmission to the chips and substrate while enabling compact stacked configurations
Solution Approach 2:
The patent employs composite material design in the adhesive formulation, combining polymer matrices with functional additives and fillers that provide both bonding capability and stress buffering. The composite structure allows the material to simultaneously accommodate thermal expansion differences and provide mechanical support for the stacked chips, resolving the footprint reduction versus stress management contradiction
3Length of stationary object
If wafer thinning is performed to minimize chip stack height, then stack height is reduced, but the bonding material must be strongly bonded for protection yet easily removable after thinning
Solution Approach 1:
The patent applies dynamics by designing the bonding material with time-dependent and condition-dependent properties. The material provides strong, protective bonding during the thinning process, then can be dynamically changed from a bonded state to a removable state through controlled thermal or chemical treatment, allowing the same material to satisfy both protection and removal requirements at different stages of the process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These polymer compositions provide strong, reliable bonds with low dielectric constant and moisture absorption, enabling efficient chip stacking and wafer thinning while allowing for easy removal and rework, thus addressing the limitations of existing technologies.
Implementation Method 1
compositions that are photodefinable to form patterns, are capable of forming reliable bonds between electronic or optoelectronic devices or between such devices and substrates
Implementation Method 2
where the cured polymer, film, layer or structure has a glass transition temperature (Tg) of at least 170° C., and where the cured polymer, film, layer or structure has moisture absorption of less than 2.0 weight percent
Implementation Method 3
such materials used by such methods should also provide a stress buffer function, where they are used to attach such a chip or chip stack to a substrate having a different coefficient of linear expansion
Data Source
AI summary
Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.