N-phase polarity encoded serial interface for LCD driver skew reduction
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Solution Overview
Problem
Conventional high-speed serial interface systems face challenges with skew between data and clock signals, leading to limited data rates and increased power consumption, particularly in applications like integrated LCD Controller-Driver circuits.
Innovation Solution
The implementation of an N-phase polarity data transfer method, which encodes data in multi-bit symbols and transmits them on multiple connectors using phase-shifted multi-phase signals, eliminating the need for de-skewing circuitry by embedding clock information in the data signal and reducing active drivers for lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If separate data and clock signals are used in conventional high-speed serial interfaces, then data transmission can be achieved, but skew between the two signals limits the maximum possible link data rate
Solution Approach 1:
The patent merges the data and clock signals into a single integrated signal by encoding clock information within the data signal itself. This is achieved through transition-based encoding where the receiver detects edges (transitions) in the data signal to recover clock timing information, eliminating the need for separate clock signaling and associated de-skewing circuitry.
Solution Approach 2:
The patent extracts the clock function from the separate clock signal and embeds it within the data signal structure. The clock information is derived by detecting transitions in the data signal, allowing the receiver to recover timing information without requiring a dedicated clock line or complex de-skewing mechanisms.
2Reliability
If de-skewing circuitry is used to eliminate skew between data and clock signals, then timing alignment is improved, but real estate requirements and link start-up time are increased
Solution Approach 1:
The patent removes the de-skewing circuitry entirely by extracting clock timing information directly from the data signal transitions. This eliminates the need for additional circuit components that would occupy real estate on the integrated circuit, while maintaining reliable timing alignment through edge-based clock recovery.
3Reliability
If de-skewing circuitry is used to eliminate skew between data and clock signals, then timing alignment is improved, but link start-up time is increased
Solution Approach 1:
The patent eliminates de-skewing circuitry and instead extracts clock timing information directly from data signal transitions. This approach reduces link start-up time because the receiver can immediately begin detecting edges and recovering clock information without requiring complex initialization sequences or warm-up periods associated with de-skewing circuits.
4Productivity
If conventional serial interface systems are used with separate data and clock signals, then data transmission is achieved, but skew problems persist when operating at high speeds
Solution Approach 1:
The patent merges data and clock functions into a single signal, allowing the system to operate at high speeds without skew problems. By encoding clock information in the data signal transitions, the system maintains synchronization inherently, enabling higher operating speeds while preserving reliable data transmission.
5Power
If integrated receiver devices are built with larger feature sizes to drive high voltages, then voltage driving capability is improved, but logic speed becomes slower
Solution Approach 1:
The patent changes the signaling parameters by using transition-based encoding with smaller voltage swings. This allows receiver devices with larger feature sizes to achieve both adequate voltage driving capability and faster logic speeds, as the smaller transitions can be processed more quickly while still conveying the necessary data and timing information through edge detection.
Data Source
AI summary
System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Data is encoded in multi-bit symbols, and the multi-bit symbols are transmitted on a plurality of connectors. The multi-bit symbols may be transmitted by mapping the symbols to a sequence of states of the plurality of connectors, and driving the connectors in accordance with the sequence of states. The timing of the sequence of states is determinable at a receiver at each transition between sequential states. The state of each connector may be defined by polarity and direction of rotation of a multi-phase signal transmitted on the each connector.