Secondary Electron Injection NROM Cell Programming
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Solution Overview
Problem
Nitride read-only memory (NROM) cells face challenges with secondary electron injection, which can lead to 'second bit' and retention after cycling problems due to wide electron distribution, and require high programming currents and numerous bitline contacts, resulting in scaling difficulties and resistance issues.
Innovation Solution
Employing secondary electron injection (SEI) with low wordline voltage, negative substrate voltage, and specific shallow and deep implants to enhance secondary electron generation and injection close to the junction, reducing channel hot electron injection and optimizing pocket implants to control electron distribution and retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If secondary electron injection is used for programming NROM cells, then programming current requirements are reduced, but electron distribution becomes wide causing second bit and retention problems
Solution Approach 1:
The patent introduces a graded pocket implant structure where the implant concentration varies spatially - higher concentration near the drain to focus electron injection and lower concentration away from the drain to reduce spread. This local variation in implant quality narrows the electron distribution width while maintaining the low programming current benefit of secondary electron injection
Solution Approach 2:
The patent modifies the physical parameters of the pocket implant region by adjusting the implant concentration gradient and depth profile. By changing these parameters, the electron distribution is controlled to be narrower, preventing second bit effects while retaining the energy efficiency of secondary electron injection programming
2Manufacturing precision
If channel hot electron injection is used for programming, then electron distribution is narrow, but high programming currents and numerous bitline contacts are required
Solution Approach 1:
The patent introduces a graded pocket implant as an intermediary structure that mediates between the two injection mechanisms. It enables secondary electron injection (which is more energy-efficient) to achieve the narrow electron distribution normally associated with channel hot electron injection, thus reducing programming current while maintaining precision
Solution Approach 2:
By changing the implant concentration parameters in the pocket region, the patent creates conditions that favor secondary electron generation and injection while confining the electron distribution. This parameter optimization reduces the power requirement for programming compared to conventional channel hot electron injection
3Device complexity
If secondary electron injection is used, then fewer bitline contacts are needed, but retention after cycling deteriorates
Solution Approach 1:
The graded pocket implant creates local quality variations where the implant concentration is optimized in specific regions to ensure electrons are injected and retained in the correct charge storage area. This prevents the wide distribution that causes retention problems while maintaining the simplified bitline contact structure enabled by secondary electron injection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces programming current and voltage requirements, narrows electron distribution, and improves retention and punchthrough, allowing for more efficient and reliable NROM cell operation with fewer bitline contacts and relaxed power supply constraints.
Implementation Method 1
utilizing secondary electron injection to perform a given electron injection operation
Implementation Method 2
enhancing secondary electron generation and injection close to the junction, reducing channel hot electron injection
Data Source
AI summary
Secondary electron injection (SEI) is used for programming NVM cells having separate charge storage areas in an ONO layer, such as NROM cells. Various combinations of low wordline voltage (Vwl), negative substrate voltabe (Vb), and shallow and deep implants facilitate the process. Second bit problems may be controlled, and retention and punchthrough may be improved. Lower SEI programming current may result in relaxed constraints on bitine resistance, number of contacts required, and power supply requirements.


