Configurable NTT Butterfly Circuit for Homomorphic Encryption
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Solution Overview
Problem
Existing technologies face challenges in efficiently processing encrypted data due to the computation-intensive nature of fully homomorphic encryption, which hinders performance in cloud-based computing environments.
Innovation Solution
The development of an integrated circuit (IC) homomorphic processor chip with a configurable number theoretic transform (NTT) butterfly unit that operates in multiple modes for performing operations on encrypted data using homomorphic encryption, allowing for efficient processing of both fully and partially homomorphic encryption operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fully homomorphic encryption operations are performed on encrypted data, then data privacy is preserved, but computational complexity and processing time increase significantly
Solution Approach 1:
The homomorphic encryption operations are divided into distinct functional units: NTT butterfly units for transform operations, ciphertext operation units for arithmetic operations on encrypted data, and key management units. This segmentation allows parallel processing of different operation types, reducing overall computational time while maintaining security.
Solution Approach 2:
The system performs preliminary actions by pre-computing and storing transformation tables, key pairs, and parameter sets in memory before actual encryption operations. The NTT transforms and key generation are prepared in advance, allowing faster execution of the actual homomorphic operations on encrypted data.
2Reliability
If computation-intensive homomorphic encryption operations are performed, then secure cloud computing is enabled, but processing speed decreases
Solution Approach 1:
The patent merges multiple functional units into an integrated homomorphic processor chip: NTT butterfly units are combined with ciphertext operation units, key management functions are integrated into the same chip, and memory units are coupled directly to the processing units. This integration reduces data transfer overhead and enables coordinated processing, significantly improving speed while maintaining security.
Solution Approach 2:
The system employs dynamic configuration where the homomorphic processor can be programmed with different parameter sets and key pairs for various security requirements. The NTT transform parameters, modulus values, and key lengths can be dynamically adjusted based on the specific security needs and performance requirements of different cloud computing tasks.
3Adaptability or versatility
If multiple homomorphic encryption modes are supported, then versatility is improved, but device complexity increases
Solution Approach 1:
The homomorphic processor chip is designed as a universal platform that can perform multiple types of homomorphic encryption operations: polynomial multiplication, integer multiplication, key generation, encryption, and decryption. The same physical hardware (NTT butterfly units and ciphertext operation units) can be configured to perform different cryptographic functions by loading different parameter sets and control logic, avoiding the need for separate dedicated circuits for each function.
Data Source
AI summary
Fully homomorphic encryption integrated circuit (IC) chips, systems and associated methods are disclosed. In one embodiment, a method of operation for a number theoretic transform (NTT) butterfly circuit is disclosed. The (NTT) butterfly circuit includes a high input word path cross-coupled with a low word path. The high input word path includes a first adder/subtractor, and a first multiplier. The low input word path includes a second adder/subtractor, and a second multiplier. The method includes selectively bypassing the second adder/subtractor and the second multiplier, and reconfiguring the low and high input word paths into different logic processing units in response to different mode control signals.