Homomorphic Encryption NTT Matrix Lane Allocation

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Solution Overview

Problem

In lattice-based encryption systems, the method for processing number-theoretic transforms (NTT) is inefficient, particularly for high-degree polynomial multiplications, leading to slow polynomial multiplication operations and inefficient operators or accelerators.

Innovation Solution

A method and apparatus that optimize NTT operations by allocating elements of a matrix to data lanes in a specific manner, performing first and second NTT operations with butterfly, twisting, transpose, and FFT operations, and storing results in a register file to improve efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional NTT processing methods are used in lattice-based encryption systems, then the implementation is straightforward, but the polynomial multiplication operation becomes inefficient and slow

Engineering Contradiction:
Improvepolynomial multiplication speedVSAvoidNTT operation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the polynomial multiplication process into distinct stages: forward NTT transformation of input polynomials, pointwise multiplication in the transformed domain, and inverse NTT transformation to obtain the result. This segmentation allows each stage to be optimized independently, particularly enabling parallel processing during the pointwise multiplication phase, thereby improving overall polynomial multiplication speed while managing NTT operation time efficiently.

Inventive Principle:
Principle #1Segmentation

2Reliability

If high-degree polynomial multiplications are performed frequently in lattice-based encryption, then the encryption functionality is achieved, but the processing efficiency deteriorates

Engineering Contradiction:
Improveencryption functionalityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces the conventional sequential mechanical processing approach with a parallel computing architecture. By utilizing multiple processing units that can simultaneously perform pointwise multiplications at different points in the transformed domain, the system maintains reliable encryption functionality for high-degree polynomials while dramatically improving processing efficiency through parallel execution of computational tasks.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If traditional NTT operators or accelerators are used, then the system architecture is simple, but the operation speed is insufficient for high-degree polynomials

Engineering Contradiction:
Improveoperator architectureVSAvoidNTT operation speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent transitions from traditional single-dimensional sequential processing to a multi-dimensional parallel architecture. By organizing processing units in a dimensional structure that enables simultaneous operations across multiple points in the NTT transformed domain, the system achieves higher NTT operation speeds for high-degree polynomials while maintaining manageable architectural complexity through systematic organization of the parallel components.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250202701A1Method and apparatus with homomorphic encryption operation
Publication Date: 2025.06.19 SAMSUNG ELECTRONICS CO LTD
  • US20250202701A1 patent drawing
  • US20250202701A1 patent drawing
  • US20250202701A1 patent drawing

AI summary

A method with a number-theoretic transform (NTT) operation includes allocating an element of a matrix to a data lane such that elements in a first column of the matrix corresponding to a polynomial are allocated to the data lane of a first lane group among lane groups, wherein the matrix is a square matrix, and a number of elements comprised in the matrix is N, performing a first NTT operation on a data lane of a fourth root of the N for each of the lane groups, allocating a result of the first NTT operation to the data lane such that the matrix is transposed, based on adjustment of a reading order of a buffer that stores the result of the first NTT operation, and performing a second NTT operation on the data lane of the fourth root of the N for each of the lane groups.