NTT Accelerator Stage Enable Control for Variable Polynomial Degrees
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Solution Overview
Problem
Existing homomorphic encryption devices face inefficiencies in processing multiplication operations between ciphertexts due to the need for hardware operators that are not adaptable to changes in the degree of homomorphic ciphertext polynomials, leading to potential failure or wastage of computational resources.
Innovation Solution
An accelerator is designed with stages that perform Number Theoretic Transform (NTT) operations, each controlled by an enable signal based on the polynomial degree, allowing selective enablement or bypassing of stages to optimize processing for variable polynomial degrees.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a hardware operator is designed based on a fixed polynomial degree, then the device complexity is reduced, but the adaptability to different polynomial degrees deteriorates
Solution Approach 1:
The hardware operator incorporates dynamically controllable enable signals that allow each stage to be selectively activated or deactivated based on the input polynomial degree. This dynamic control mechanism enables the fixed-structure operator to adapt its functional behavior to different polynomial degrees without requiring multiple dedicated hardware configurations.
Solution Approach 2:
The system changes the operational parameters of the hardware operator by varying the enable signal states across different stages based on the polynomial degree parameter. This allows the same physical hardware to operate in different functional modes corresponding to different polynomial degrees, resolving the contradiction between fixed structure and variable adaptability.
2Speed
If all stages are always active, then the processing speed is maximized for high-degree polynomials, but the energy consumption and resource wastage increase for low-degree polynomials
Solution Approach 1:
The system applies partial action by activating only the necessary number of stages corresponding to the input polynomial degree. For low-degree polynomials, only the required subset of stages is enabled, avoiding the energy wastage of activating all stages. For high-degree polynomials, more stages are activated to maintain processing speed, optimizing the trade-off between speed and energy consumption based on the actual computational requirements.
3Adaptability or versatility
If the hardware operator is designed for maximum polynomial degree, then it can handle all cases, but the resource utilization efficiency deteriorates for smaller degrees
Solution Approach 1:
The hardware operator is segmented into multiple independent stages, each capable of being independently controlled via enable signals. This segmentation allows the system to activate only the necessary number of stages for the given polynomial degree, improving resource utilization efficiency while maintaining the ability to handle maximum polynomial degree when required.
Data Source
AI summary
Disclosed is an accelerator which includes a first to a K-th stage performing an NTT (Number Theoretic Transform) operation of first input data including a polynomial of a homomorphic ciphertext, the first to K-th stages being connected in series, and a first assist circuit generating a first to a K-th enable signal based on a degree of the polynomial of the first input data. Each of the first to K-th stages performs a butterfly operation of the first input data or corresponding output data of a previous stage in response to that the corresponding enable signal among the first to K-th enable signals indicates a first logical value, and bypasses the first input data or the corresponding output data of the previous stage in response to that the corresponding enable signal among the first to K-th enable signals indicates a second logical value.