No-Flow Underfill for WLCSP Solder Ball Drop Reliability

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Solution Overview

Problem

The existing wafer level chip scale packaging (WLCSP) technologies face challenges in the ball drop performance, which affects the reliability and efficiency of interconnects in semiconductor devices, particularly due to limitations in the formation and stability of bump structures and under bump metallurgy.

Innovation Solution

The method involves forming a bump structure with an under-bump metallization layer and a molding compound layer, where a no-flow underfill layer is used to enhance the thermal cycling life and improve solder ball drop performance by reflowing the solder bump and forming an interconnected joint structure between substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional ball drop process is used in WLCSP, then manufacturing simplicity is maintained, but solder ball drop performance deteriorates

Engineering Contradiction:
Improvesolder ball drop performanceVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

A no-flow underfill layer is introduced as an intermediary material between the substrate and the solder bump. This underfill layer provides mechanical support and stabilization to the solder bump during thermal cycling, preventing solder ball drop while maintaining a relatively simple manufacturing process that builds upon existing WLCSP techniques

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a composite structure consisting of multiple layers including the substrate, no-flow underfill layer, under-bump metallurgy layer, and solder bump. This composite material system combines the advantages of each layer to achieve improved solder ball drop performance while managing thermal and mechanical stresses

Inventive Principle:
Principle #40Composite materials

2Duration of action of moving object

If bump structure is formed without no-flow underfill layer, then manufacturing process is simpler, but thermal cycling life deteriorates

Engineering Contradiction:
Improvethermal cycling lifeVSAvoidstructure complexity
Core Design Contradiction:
Duration of action of moving objectVSDevice complexity

Solution Approach 1:

The no-flow underfill layer serves as a mediator between the substrate and the bump structure, providing mechanical support and stress distribution during thermal cycling. This intermediary layer significantly extends the thermal cycling life of the package assembly by preventing direct stress concentration at the solder bump interface

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The no-flow underfill layer is applied beforehand to provide cushioning and mechanical support to the solder bump before thermal cycling occurs. This pre-positioned protective layer prevents solder ball drop and extends thermal cycling life by absorbing and distributing thermal stresses

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the reliability and efficiency of interconnects by enhancing the thermal cycling life of the package assembly and improving solder ball drop performance, thereby addressing the limitations in existing WLCSP technologies.

Implementation Method 1

enhancing the thermal cycling life of the package assembly

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

reflowing the solder bump and forming an interconnected joint structure between substrates

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS10665565B2Package assembly
Publication Date: 2020.05.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10665565B2 patent drawing
  • US10665565B2 patent drawing
  • US10665565B2 patent drawing

AI summary

The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a bump structure disposed on a first substrate and a molding compound in physical contact with the bump structure. The bump structure protrudes from the molding compound. A conductive region is on a second substrate and contacts the bump structure. A no-flow underfill (NUF) material is vertically between the molding compound and the second substrate and laterally surrounds the bump structure. The NUF material is separated from the molding compound.