NUMA-Aware Virtual Machine Isolation for RAN Distributed Units

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional multiple-processor servers in pooled mode incur latency penalties due to requests crossing Non-Uniform Memory Access (NUMA) boundaries, which can increase processing latency and reduce throughput.

Innovation Solution

The facility operates separate processors in isolation by configuring a virtual machine per processor, limiting resource consumption to directly connected hardware, and mapping virtual network ports to physical ports connected to each processor, ensuring that requests are processed using only local resources without crossing NUMA boundaries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processors are operated in pooled mode to handle large volumes of requests, then resource utilization and failure tolerance are improved, but processing latency increases due to NUMA boundary crossing

Engineering Contradiction:
Improverequest processing capacityVSAvoidprocessing latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system segments the pooled processing model into isolated processor groups, where each processor or group of processors handles a specific subset of requests independently. This segmentation prevents requests from crossing NUMA boundaries by assigning them to processors within the same NUMA node, thereby reducing latency while maintaining distributed processing capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by optimizing resource allocation at the NUMA node level. Each processor is configured to access local memory and resources within its NUMA boundary, ensuring that frequently accessed data resides in locally connected memory. This local optimization reduces access latency and improves processing speed for requests handled by each processor segment.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If requests are distributed across all processors in pooled mode, then load balancing is improved, but NUMA boundary crossing increases latency

Engineering Contradiction:
Improveload distributionVSAvoidlatency penalty
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The load distribution mechanism is segmented into NUMA-aware processor groups. Instead of uniform distribution across all processors, requests are routed to specific processor segments based on their NUMA node affiliation. This segmentation enables load balancing within each NUMA boundary, maintaining ease of operation while avoiding the latency penalty of cross-boundary access.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a NUMA-aware load balancer or intermediary component that sits between the request source and the processor pool. This intermediary intelligently routes requests to appropriate processors within the same NUMA node, acting as a mediator that achieves load distribution without causing NUMA boundary crossings. It translates general load balancing requirements into NUMA-specific routing decisions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240264858A1Streamlining the execution of software such as radio access network distributed units
Publication Date: 2024.08.08 BOOST SUBSCRIBERCO LLC
  • US20240264858A1 patent drawing
  • US20240264858A1 patent drawing
  • US20240264858A1 patent drawing

AI summary

A facility for operating an application on a server having a number of processors is described. The facility receives a number of application requests, each addressed to one of a plurality of instances of the application executing on the server. The facility causes each received application request to be processed in the application instance to which it was addressed, using exclusively processing resources of a selected one of the plurality of processors on which the application instance was invoked, using exclusively memory locations served by memory modules to which the selected processor is directly connected.