NUMA-Based NMP Emulator for Scalable Hardware Simulation
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Solution Overview
Problem
Existing simulation methods for near-memory processing (NMP) systems face issues such as degrading performance, high development burden, and scalability limitations, with software-based simulations being slow and FPGA-based simulations being complex and non-scalable.
Innovation Solution
A NUMA architecture-based NMP emulator apparatus comprising a host simulator module and AXDIMM emulator modules, which utilize isolated CPUs and reserved memory to simulate NMP systems, enabling parallelization of internal bandwidths and supporting flexible, scalable hardware simulations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If software-based simulation method is used, then clock-level simulation accuracy is achieved, but performance degrades when simulating large-scale applications
Solution Approach 1:
The patent creates a virtual copy of the NMP hardware system using NUMA architecture, where virtual AXDIMM modules replicate the functionality of physical NMP devices. This virtualization allows accurate hardware behavior simulation without the performance limitations of pure software emulation, as the virtual hardware model can leverage underlying hardware resources efficiently.
Solution Approach 2:
The patent replaces the traditional software-based simulation mechanism with a hardware-based virtualization mechanism using NUMA architecture. By substituting software emulation with hardware virtualization, the system achieves both the accuracy of detailed simulation and the performance of hardware execution, overcoming the fundamental trade-off between accuracy and speed in traditional software simulation.
2Reliability
If FPGA-based simulation method is used, then hardware accuracy is achieved, but development burden increases and scalability degrades
Solution Approach 1:
The patent creates a universal virtual NMP platform based on NUMA architecture that can simulate different NMP hardware configurations and applications through software configuration rather than hardware redesign. The virtual AXDIMM modules can be programmatically configured to represent various NMP device types, eliminating the need for separate FPGA development for each hardware variant and enabling broad scalability.
Solution Approach 2:
The patent enables flexible configuration of virtual NMP device parameters through software, allowing dynamic adjustment of memory capacity, processing units, and interconnect topologies without physical hardware changes. This parameter-based configuration approach replaces complex FPGA programming and hardware redesign, significantly reducing development burden while maintaining hardware-level simulation accuracy.
3Reliability
If FPGA-based simulation method is used, then hardware behavior is accurately simulated, but scalability degrades
Solution Approach 1:
The patent segments the virtual NMP system into modular NUMA nodes and virtual AXDIMM modules that can be independently configured and scaled. Each NUMA node represents an independent simulation domain that can be replicated and combined to simulate systems of varying scales, from single-node to multi-node configurations, enabling seamless scalability while maintaining hardware-accurate behavior in each segment.
Data Source
AI summary
A non-uniform memory access (NUMA) architecture-based near-memory processing (NMP) emulator apparatus includes a host simulator module configured to perform a function of a host system using a non-uniform memory access (NUMA) node of a NUMA architecture, and one or more acceleration dual in-line memory module (AXDIMM) emulator modules, wherein each of the one or more AXDIMM emulator modules is configured to perform a function of a stream of an AXDIMM architecture using a NUMA node of the NUMA architecture.