NUMA Global Variable Partitioning for Cache Coherency Traffic Reduction
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Solution Overview
Problem
Computing devices with non-uniform memory access (NUMA) schemes face challenges in reducing data access latency, as making variables NUMA-aware can increase cache cross-coherency traffic and memory usage.
Innovation Solution
The method involves partitioning global variables into arrays, with each element stored in a different cache line across multiple NUMA groups, allowing each thread to write to its corresponding cache line and invalidate others, reducing memory footprint and improving access efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If global variables are made NUMA-aware by partitioning them into arrays with elements stored in different cache lines across NUMA groups, then data access latency is reduced for each thread, but cache cross-coherency traffic increases
Solution Approach 1:
The patent segments global variables into arrays where each element corresponds to a specific NUMA group. Each thread writes to its designated cache line element, and the system tracks which cache lines need invalidation. This segmentation allows threads to access their local NUMA group data without triggering full cache coherence invalidations across all cache lines, thus reducing coherence traffic while maintaining low access latency.
Solution Approach 2:
The patent implements local quality by making each cache line element within a NUMA group have specialized properties - each element is associated with a specific thread and NUMA group. When a thread writes to its local element, only the coherence state of that specific element and its associated cache lines are updated, rather than invalidating all cache lines. This localized approach reduces coherence traffic while preserving fast local access.
2Productivity
If global variables are made NUMA-aware by partitioning them into arrays with elements stored in different cache lines, then data access efficiency is improved, but the amount of memory used to store representations of the data increases
Solution Approach 1:
The patent segments global variables into arrays with the same number of elements as there are NUMA groups. Each element of the array is stored in a different cache line associated with a specific NUMA group. This segmentation allows the system to maintain multiple copies of the variable (one per NUMA group) without requiring additional memory beyond what is needed for the array structure itself, as the array elements are placed in existing cache lines rather than allocating separate memory regions.
Solution Approach 2:
The patent makes cache lines serve multiple functions: they store data elements for NUMA-aware variables, enable thread-specific writes, and provide the basis for selective invalidation. By reusing existing cache line infrastructure for storing array elements and managing coherence, the system avoids the need for dedicated additional memory structures, thus improving data access efficiency without proportionally increasing memory usage.
Data Source
AI summary
A method and system for making global variables NUMA-aware by identifying a first and a second global variable; determining a quantity of NUMA groups of a computing device; partitioning, based on the quantity of NUMA groups, the first global variable into a first global variable array of first global variable array elements; storing each first global variable array element in a different cache line of a first plurality of cache lines of a first cache associated with a first NUMA group of the NUMA groups; partitioning, based on the quantity of NUMA groups, the second global variable into a second global variable array of second global variable array elements; and storing each second global variable array element in a different cache line of a second plurality of cache lines of a second cache associated with a second NUMA group of NUMA groups.