Multi-Core Processor Lock Switching for NUMA Contention

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Solution Overview

Problem

In non-uniform memory accessing (NUMA) architectures, the use of primitive locks in a first-in and first-out manner leads to cross-NUMA-node events, resulting in low system performance due to inefficient data synchronization across different NUMA nodes.

Innovation Solution

A multi-core processor that adaptively switches between primitive and NUMA locks based on competition intensity, prioritizing processes on the same NUMA node in the NUMA lock mode to reduce cross-NUMA-node events and enhance system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If primitive locks are used in a first-in and first-out manner, then the locking mechanism is simple and easy to implement, but cross-NUMA-node events occur frequently resulting in low system performance

Engineering Contradiction:
Improvelocking mechanism simplicityVSAvoidsystem performance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements a dynamic lock mode selection mechanism that adapts between primitive lock mode and NUMA lock mode based on the competition level indicator. The system transitions from a static locking approach to a dynamic one that responds to system conditions, selecting the appropriate lock mode to optimize performance while maintaining simplicity when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the locking behavior parameter based on the competition level indicator. When the indicator exceeds a threshold, the system switches from FIFO-based primitive locks to NUMA-aware locking, fundamentally changing how lock acquisition is handled to reduce cross-NUMA-node events and improve performance.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If NUMA lock mode is used to prioritize processes on the same NUMA node, then cross-NUMA-node events are reduced and system performance improves, but the locking mechanism becomes more complex

Engineering Contradiction:
Improvesystem performanceVSAvoidlocking mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses dynamic lock mode selection to manage complexity. Instead of always implementing the complex NUMA lock mechanism, the system dynamically switches to primitive locks when the competition level indicator is low, thereby reducing operational complexity while maintaining performance benefits when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the locking parameter based on the competition level indicator, using simple FIFO locking when competition is low and NUMA-aware locking when competition is high. This conditional parameter change allows the system to achieve performance improvements without permanently bearing the complexity overhead.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the lock mode is switched adaptively based on competition level, then system performance is optimized in both competitive and less competitive environments, but the control mechanism becomes more complex

Engineering Contradiction:
Improvelock mode adaptabilityVSAvoidcontrol mechanism complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the competition level indicator is continuously monitored and used to adjust the lock mode. This feedback loop enables the system to adapt to changing conditions automatically, optimizing performance across different environments while the feedback mechanism itself manages the complexity of control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250370758A1Multi-core processor, operating method, and instructions therefor
Publication Date: 2025.12.04 VIA ALLIANCE SEMICON CO LTD
  • US20250370758A1 patent drawing
  • US20250370758A1 patent drawing
  • US20250370758A1 patent drawing

AI summary

An efficient multi-core processor is provided, with processor instructions and an operating method associated with lock competition of a shared computing resource. A lock-application instruction is provided. Accordingly, the different processes executed by the different central processing unit (CPU) cores stand in a queue for right-of-access to the shared computing resources. The execution of the lock-application instruction is accompanied by the monitoring of a competition-level indicator. Based on the competition-level indicator, the lock of the shared computing resource is switched from a primitive lock mode that follows the first-in and first-out rule, to a Non-Uniform Memory Access (NUMA) lock mode.