NUMA Memory Zeroing via Affinity-Aware Parallel Worker Threads

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Solution Overview

Problem

Existing methods for zeroing large memory regions in computing systems with non-uniform memory access (NUMA) are inefficient, leading to prolonged teardown times and visible delays, especially as memory sizes increase, due to the time-consuming nature of traditional zeroing processes and the impact of varying access pathways between processors and memory locations.

Innovation Solution

The implementation of a method that sorts memory pages by affinity domain and utilizes worker threads local to each domain for parallel zeroing, allowing memory to be zeroed in the background, thereby reducing zeroing time and improving efficiency by optimizing memory access times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional sequential zeroing methods are used, then memory pages are zeroed in a straightforward manner, but the process becomes time-consuming and hardware intensive as memory sizes grow

Engineering Contradiction:
Improvememory zeroing completenessVSAvoidzeroing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the large memory region into multiple smaller sub-regions or pages that can be zeroed independently and in parallel. This segmentation allows the zeroing operation to be distributed across multiple worker threads, each handling a portion of the memory, thereby reducing the overall time required while maintaining complete zeroing coverage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by allocating and initializing memory regions before they are fully needed. By pre-zeroing memory pages in the background using worker threads before the main application requires them, the system reduces the critical path time and avoids blocking the main execution flow

Inventive Principle:
Principle #10Preliminary action

2Productivity

If traditional zeroing processes are used, then the zeroing operation completes the task, but it causes prolonged teardown times and visible delays

Engineering Contradiction:
Improvezeroing throughputVSAvoidteardown time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements periodic action by using background worker threads that perform zeroing operations asynchronously and periodically rather than blocking the main thread. This allows the system to continue other operations while periodically making progress on zeroing memory, improving overall productivity without extending visible teardown time

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent introduces worker threads as intermediary components that mediate between the main application thread and the memory zeroing operation. These intermediary threads handle the time-consuming zeroing task in the background, allowing the main thread to proceed without waiting, thereby improving productivity while reducing perceived teardown time

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If parallel zeroing with worker threads is used, then zeroing speed is improved, but system complexity increases

Engineering Contradiction:
Improvezeroing speedVSAvoidsystem complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the number of worker threads configurable and adaptable based on system conditions. Rather than using a fixed number of threads, the system can dynamically adjust thread creation and termination based on available resources and workload, achieving high zeroing speed while managing system complexity through flexible, condition-based thread management

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10248175B2Off-line affinity-aware parallel zeroing of memory in non-uniform memory access (NUMA) servers
Publication Date: 2019.04.02 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10248175B2 patent drawing
  • US10248175B2 patent drawing
  • US10248175B2 patent drawing

AI summary

A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request to delete a memory region, forwarding the request to an intermediate software thread, and using the intermediate software thread to perform the request as a background process. The method further includes, upon receiving a message from the intermediate software thread, returning to a system caller, while performing the request, via the intermediate software thread, continues in the background.