NUMA-Aware Packet Handling via Local Memory Access

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Solution Overview

Problem

In virtualized computing environments with multiprocessor architectures like NUMA, remote memory access inefficiencies lead to performance degradation due to slower access times and limited bandwidth, affecting packet handling and overall system performance, especially for latency-sensitive traffic.

Innovation Solution

Implementing a NUMA-aware approach by attaching virtual network interface controllers (VNICs) to multiple NUMA nodes and allocating memory resources based on node affinity to minimize remote memory access, thereby optimizing packet handling and reducing latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If virtual machines are deployed on multiprocessor architecture hosts, then system resource utilization is improved, but packet handling performance deteriorates due to remote memory access

Engineering Contradiction:
Improvesystem resource utilizationVSAvoidpacket handling speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent applies local quality by associating virtual devices (VNICs, VDIs) with specific NUMA nodes and allocating their memory resources locally on the same NUMA node. This ensures that each virtual device accesses memory from its local NUMA node rather than remote memory, optimizing access speed while maintaining resource utilization across multiple processors.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If memory resources are allocated remotely to virtual devices, then resource flexibility is improved, but access latency increases

Engineering Contradiction:
Improveresource flexibilityVSAvoidmemory access latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by pre-associating virtual devices with specific NUMA nodes during device creation and pre-allocating memory resources from the corresponding NUMA node. This preliminary configuration ensures that when the virtual devices operate, they immediately access local memory without incurring remote access latency, while still maintaining overall resource flexibility through the virtualization layer.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If virtual devices span multiple NUMA nodes, then resource sharing is improved, but bandwidth is limited

Engineering Contradiction:
Improveresource sharingVSAvoidbandwidth
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies segmentation by dividing virtual device memory resources across multiple NUMA nodes, with each NUMA node having its own local memory allocation for devices associated with it. This segmentation allows resource sharing through the virtualization layer while ensuring that each segment accesses memory locally, avoiding bandwidth limitations of remote access.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11340932B2Packet handling based on multiprocessor architecture configuration
Publication Date: 2022.05.24 VMWARE INC
  • US11340932B2 patent drawing
  • US11340932B2 patent drawing
  • US11340932B2 patent drawing

AI summary

Example methods and systems for packet handling based on a multiprocessor architecture configuration are provided. One example method may comprise: in response to receiving a first ingress packet that requires processing by a first virtual central processing unit (VCPU) running on the first node, steering the first ingress packet towards a first receive (RX) queue and performing local memory access on the first node to access the first ingress packet from the first RX queue. The method may also comprise: in response to receiving a second ingress packet that requires processing by a second VCPU running on the second node, steering the second ingress packet towards a second RX queue and performing local memory access on the second node to access the second ingress packet from the second RX queue.