Non-volatile Memory Disturb Monitoring with Weighted Counters
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Solution Overview
Problem
Existing non-volatile memory systems face inefficiencies in monitoring read and write disturbs, leading to data loss due to the need for periodic scanning of all memory locations, which wastes bandwidth and may result in data loss before cells can be refreshed.
Innovation Solution
A method that accumulates the weighted effects of read and write disturbances in a single counter for each memory cell, using scale factors to account for the impact of neighboring cells, and refreshes cells when the threshold is reached, rather than relying on counting reads and writes, allowing for immediate refresh and reducing unnecessary scans.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic scanning of all memory location counters is used to monitor disturbs, then all locations are checked for refresh needs, but memory bandwidth is wasted checking locations that do not need refresh
Solution Approach 1:
The patent extracts only the necessary monitoring information by maintaining separate read-disturb and write-disturb counters for each memory location, and only scanning locations where disturbances have been recorded, rather than periodically scanning all memory locations regardless of their disturbance status
Solution Approach 2:
The monitoring system serves itself by using the disturbance counters to automatically identify which memory locations require attention, eliminating the need for external periodic scanning of all locations and allowing the system to focus resources only where needed
2Reliability
If periodic scanning of all memory location counters is used to monitor disturbs, then all locations are checked for refresh needs, but data may be lost due to multiple disturbances between sweeps
Solution Approach 1:
The patent performs preliminary monitoring by maintaining running disturbance counters that continuously track read and write disturbances as they occur, so that when a threshold is reached, the memory location is immediately identified for refresh without waiting for a periodic scan cycle
Solution Approach 2:
The disturbance counters provide continuous feedback on the disturbance level at each memory location, enabling the system to detect when a location approaches its refresh threshold and trigger a refresh operation promptly, reducing the time delay between disturbance accumulation and refresh action
3Measurement precision
If separate counters for read and write operations are maintained for each location, then disturbance tracking is comprehensive, but device complexity increases
Solution Approach 1:
The patent merges the read-disturb and write-disturb counters into a unified monitoring framework where both types of disturbances are tracked using the same counter structure and threshold comparison logic, simplifying the overall system while maintaining comprehensive tracking of both read and write disturbances
Data Source
AI summary
A non-volatile memory has multi-level arrays of write-in place memory cells that are subject to change over time because of read and write disturbs. Disturb count counters of each read cell and each cell surrounding a written target cell are incremented by different scaling factors that reflect the effect of the disturbs on each such cell. Upon a counter reaching a predetermined threshold, a refresh of the cell is initiated.