Non-volatile Memory Capacitors Below I/O Pads
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Solution Overview
Problem
The challenge in semiconductor memory systems is the distortion of signals due to large swings in current on power I/O pads, which can alter the duty cycle of synchronization clock signals, preventing reliable synchronization and communication between the memory die and controller, especially in smaller electronic devices where increased size is undesirable.
Innovation Solution
Converting unused portions of the memory die into usable capacitors connected to the power I/O pad to stabilize current fluctuations, thereby maintaining signal integrity without increasing the memory die size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If capacitors are added to stabilize current fluctuations on power I/O pads, then signal integrity and timing reliability are improved, but the memory die size increases
Solution Approach 1:
The metal interconnect layers and I/O pad structures are designed to serve dual functions: their primary function for signal transmission and their secondary function as capacitor plates for current stabilization. By configuring metal layers below I/O pads as capacitor plates and using the I/O pad metal structures as the other capacitor plate, the same physical structures perform both signal transmission and capacitance functions, eliminating the need for separate capacitor components and resolving the contradiction between improving reliability and maintaining compact size.
2Reliability
If capacitors are added to stabilize current fluctuations on power I/O pads, then timing reliability is improved, but device complexity increases
Solution Approach 1:
The capacitor structure is merged with the existing I/O pad and metal interconnect layer structures. The metal layers that would otherwise be unused or serve only for electrical connection are repurposed and configured as capacitor plates. This merging approach integrates the capacitance function into the existing device architecture without requiring additional discrete capacitor components, thereby improving timing reliability while avoiding increased device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively stabilizes current fluctuations, ensuring reliable signal communication and timing without adding to the memory die's size, thus addressing the issue of signal distortion and size constraints in smaller devices.
Implementation Method 1
The capacitor is positioned in one or more metal interconnect layers below at least one of the I/O pads
Data Source
AI summary
A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the I/O pads.