Non-Volatile Memory ECC Adaptation for Wear and Capacity
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Solution Overview
Problem
Non-volatile memories like Flash and Phase Change Memories face failure after a limited number of write cycles, leading to increased read errors and reduced memory capacity due to wear and tear, with existing error correction methods failing to effectively manage and extend their lifespan.
Innovation Solution
Implementing a combination of modified wear leveling, varying orthogonal error correction with defect levels, and logical to physical address mapping using a serial Content Addressable Memory (CAM) to selectively increase error correction capability and improve data integrity, allowing for the continued use of defective storage beyond simple error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction codes are used in non-volatile memory, then read errors can be detected and corrected, but the memory capacity effectively reduces as errors increase and blocks are marked bad
Solution Approach 1:
The patent dynamically changes the error correction capability parameters (ECC strength, code rate) based on the observed error rates in different memory blocks. As error rates increase, the system adjusts to use stronger error correction codes, allowing previously unusable blocks to remain accessible with appropriate error protection levels.
Solution Approach 2:
The system transitions from static error correction (fixed ECC parameters for all blocks) to dynamic error correction where ECC parameters are continuously adjusted based on real-time error measurements. This allows the memory system to adapt its error correction strength to match actual wear and error conditions, maximizing usable capacity.
2Duration of action of stationary object
If wear leveling is implemented to extend memory lifespan, then write cycle distribution is improved, but the system cannot effectively handle increasing error rates in worn blocks
Solution Approach 1:
The patent implements continuous feedback loops that monitor error rates in memory blocks and use this information to adjust wear leveling policies. Blocks showing increasing error rates are identified and subjected to enhanced error correction or early retirement, preventing data integrity failures while extending overall system lifespan.
Solution Approach 2:
The system performs preliminary error measurement and assessment on memory blocks before they fail completely. By detecting error trends early in the wear process, the system can proactively apply stronger error correction or migrate data from at-risk blocks, preventing future data loss and extending usable memory life.
3Reliability
If error correction capability is increased to handle worn memory, then more defective storage can be used, but the system complexity increases
Solution Approach 1:
The patent divides the memory system into segments with different error correction capabilities. Instead of applying maximum ECC to all blocks, the system segments memory into zones based on error rates and wear levels, applying appropriate error correction strength to each segment. This reduces overall complexity while maintaining reliability where needed.
Solution Approach 2:
The system applies different error correction qualities to different parts of the memory system based on local error conditions. Blocks with low error rates use minimal ECC, while blocks showing wear receive enhanced error correction. This localized approach to error correction reduces overall system complexity compared to uniform high-strength ECC across all blocks.
Data Source
AI summary
Improving the performance, life and amount of data storage in write limited non-volatile memory may be achieved by: a) utilizing a serial content-addressable memory (CAM) to perform logical address translation, b) a minimum CAM function to perform erase error count wear leveling, c) increasingly refining a two dimensional error-correction coding (ECC) method as needed to correct for degrading storage, and/or d) serially generating ECC and using an ECC serial decoder to correct the data.