NVDIMM Controller Page Mapping for DRAM-NVRAM Latency

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Solution Overview

Problem

Current information handling systems face challenges in providing efficient and persistent storage solutions that balance data access latency and capacity, as traditional DRAM and NVRAM technologies have differing access latencies and addressability, limiting their combined performance in information processing and storage applications.

Innovation Solution

A non-volatile dual in-line memory module (NVDIMM) architecture that combines a DRAM block and multiple NVRAM blocks, with an NVDIMM controller managing data by copying relevant data from NVRAM blocks into DRAM blocks for byte-addressable access, utilizing a page-based associative mapping to optimize data access and storage operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional DRAM is used for storage, then fast data access is achieved, but data persistence and large capacity are limited

Engineering Contradiction:

Improvedata access latencyVSAvoiddata persistence

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent combines DRAM and NVRAM technologies into a unified NVDIMM module, where DRAM provides fast access for active data while NVRAM provides persistent storage for the same data, resolving the contradiction between speed and reliability through physical integration and logical coordination

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If NVRAM is used for storage, then data persistence is achieved, but access latency increases

Engineering Contradiction:

Improvedata persistenceVSAvoiddata access latency

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The patent segments data into active portions stored in DRAM for fast access and persistent portions stored in NVRAM, with the NVDIMM controller managing the segmentation and automatic copying between media based on access patterns, thus reducing overall access latency while maintaining persistence

Inventive Principle:

Principle #1Segmentation

3Quantity of substance

If NVRAM blocks are used for storage, then large data capacity is achieved, but byte-addressability is limited

Engineering Contradiction:

Improvestorage capacityVSAvoidbyte-addressability

Core Design Contradiction:

Quantity of substanceVSEase of operation

Solution Approach 1:

The NVDIMM controller acts as an intermediary that translates byte-addressable access requests from the host into block-level operations on NVRAM, automatically managing data copying and mapping between the byte-addressable DRAM interface and the block-oriented NVRAM storage, thereby providing byte-addressability transparently

Inventive Principle:

Principle #24Intermediary (Mediator)

4Adaptability or versatility

If separate DRAM and NVRAM systems are used, then各自的优势 is maintained, but system complexity and integration difficulty increase

Engineering Contradiction:

Improvetechnology advantagesVSAvoidsystem integration

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges DRAM and NVRAM into a single NVDIMM module with unified packaging and integrated controller, simplifying the system architecture by eliminating the need for separate memory and storage subsystems while maintaining the complementary advantages of both technologies through close physical integration

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS10528283B2System and method to provide persistent storage class memory using NVDIMM-N with an NVDIMM-P footprint

Publication Date: 2020.01.07 DELL PROD LP

AI summary

A non-volatile dual in-line memory module (NVDIMM) includes a dynamic random access memory (DRAM) block, a plurality of non-volatile random access memory (NVRAM) blocks, and an NVDIMM controller. The DRAM block is organized into a number (N) of pages. Each NVRAM block is organized into the number (N) of pages, each page of the DRAM block being N-way set associatively associated with a page of each of the NVRAM blocks. The NVDIMM controller is configured to copy first data from a first page of a first NVRAM block to an associated first page of the DRAM block.