NVDIMM Multichip Package Integration for PCB Real Estate Reduction
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Solution Overview
Problem
Current Non-Volatile Dual In-line Memory Modules (NVDIMM) require a large amount of real estate and are costly due to the need for multiple discrete integrated circuit packages on a printed circuit board, which complicates the PCB and increases electrical loading, thus necessitating a more integrated approach to reduce size and cost while improving signal integrity.
Innovation Solution
Integrating multiple silicon die components such as NVDC, RCD, and NVM into a single multichip package (MCP) using a substrate with wire bonds and solder balls for connection to a printed circuit board, reducing the need for individual packages and minimizing interconnect lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple discrete integrated circuit packages are used on a PCB, then each component can be individually packaged and protected, but the PCB real estate requirements increase and the device complexity increases
Solution Approach 1:
The patent combines multiple discrete integrated circuit packages (NVDC, RCD, Switch, and NVM components) into a single multichip package. This merging eliminates the need for separate PCB footprints for each component, thereby reducing PCB real estate requirements while maintaining individual component protection within the integrated package structure.
Solution Approach 2:
The multichip package serves as a universal platform that houses multiple different types of integrated circuit components (controller, clock driver, switch, and memory devices) in a single package. This multi-functional approach allows one package to replace what would traditionally require multiple separate packages and PCB locations.
2Ease of manufacture
If multiple discrete integrated circuit packages are used on a PCB, then each component can be individually manufactured, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent integrates multiple individually manufactured components into a single multichip package during the packaging process. This merging reduces the complexity of PCB assembly by decreasing the number of separate components that need to be placed, routed, and connected on the board, while still allowing each component to be manufactured using standard individual IC fabrication processes.
3Reliability
If multiple discrete integrated circuit packages are used on a PCB, then electrical interconnections can be established, but the electrical loading increases and signal integrity deteriorates
Solution Approach 1:
The patent combines multiple components into a single package with internal interconnections, thereby reducing the length of external PCB traces required for electrical interconnections. This merging reduces electrical loading on the PCB and minimizes signal integrity issues by shortening the path between components and reducing the number of connection points on the board.
4Area of stationary object
If components are integrated into a single multichip package, then PCB real estate is reduced and signal integrity is improved, but the packaging complexity increases
Solution Approach 1:
The patent segments the multichip package into distinct functional areas for each component (NVDC, RCD, Switch, NVM), allowing each to be individually packaged and connected within the unified package structure. This segmentation manages the internal packaging complexity by organizing components in a systematic manner while still achieving the overall goal of integration.
Data Source
AI summary
A single multichip package is provided, comprising: a substrate having opposing upper and lower surfaces. A first die is mounted on the upper surface of the substrate and includes one or more non-volatile memory devices. A second die is mounted on the upper surface of the substrate, and includes at least one of: (a) a non-volatile memory controller that facilitates transfer of data to/from the one or more non-volatile memory devices, (b) a register clock driver for volatile memory devices, and/or (c) one or more multiplexer switches configured to switch between two or more of the volatile memory devices. A plurality of wire bonds connect the first and second dies. A plurality of solder balls are located on the lower surface of the substrate for mounting the single multichip package to a printed circuit board, the plurality of solder balls electrically coupled to the first die and the second die.