NVDIMM-N Cache Tracking Database for SCM Persistence

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Solution Overview

Problem

Storage Class Memory (SCM) devices operating in memory mode face performance limitations, leading to potential data loss due to their non-persistent nature, as volatile RDIMM/LRDIMM caches used for quick data storage are not durable and may lose data during power failures.

Innovation Solution

An Information Handling System (IHS) incorporating a Non-Volatile Dual Inline Memory Module (NVDIMM-N) subsystem with both volatile and non-volatile memory devices, which writes data to the volatile device, updates a cache tracking database, and copies critical data to non-volatile storage before shutdowns to ensure persistence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile RDIMM/LRDIMM caches are used for quick data storage in SCM memory mode, then data access speed is improved, but data persistence and reliability deteriorate due to potential data loss during power failures

Engineering Contradiction:
Improvedata access speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces a cache tracking database as an intermediary mechanism that mediates between the volatile cache and the SCM subsystem. This database tracks the state of cached data and enables recovery operations, effectively bridging the reliability gap between volatile memory and persistent storage while maintaining fast access paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by writing data to both the volatile cache and the SCM subsystem simultaneously, and by maintaining a cache tracking database that records data state before power failures can occur. This preliminary persistence ensures that even if the volatile cache is lost, the data can be recovered from SCM or the tracking database can guide reconstruction.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is written directly to SCM devices in memory mode, then persistence is improved, but data access speed deteriorates due to SCM performance limitations

Engineering Contradiction:
Improvedata persistenceVSAvoiddata access speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent extracts the performance bottleneck by separating the fast access path from the persistent storage path. The volatile RDIMM/LRDIMM cache is extracted as a dedicated high-speed access layer, while the SCM subsystem handles persistence. The cache tracking database coordinates these two separate functions, allowing fast access when possible and persistent access when needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memory system is segmented into distinct functional layers: a volatile cache layer for speed, an SCM subsystem layer for persistence, and a cache tracking database layer for coordination. This segmentation allows each component to optimize for its specific function while working together as an integrated system that provides both fast access and data persistence.

Inventive Principle:
Principle #1Segmentation

3Reliability

If a cache tracking database is maintained to monitor cached data, then data integrity is improved, but system complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cache tracking database maintains simplified copies of data state information rather than full data replicas. This copying approach provides the necessary integrity tracking for recovery operations while keeping the tracking database compact and manageable, avoiding the complexity of maintaining complete data copies across all storage layers.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10394710B2Storage class memory (SCM) memory mode cache system
Publication Date: 2019.08.27 DELL PROD LP
  • US10394710B2 patent drawing
  • US10394710B2 patent drawing
  • US10394710B2 patent drawing

AI summary

An SCM memory mode NVDIMM-N cache system includes an SCM subsystem, and an NVDIMM-N subsystem having at volatile memory device(s) and non-volatile memory device(s). A memory controller writes data to the volatile memory device(s) and, in response, updates a cache tracking database. The memory controller then writes a subset of the data to the SCM subsystem subsequent to the writing of that data to the volatile memory device(s) and, in response, updates the cache tracking database. The memory controller then receives a shutdown signal and, in response, copies the cache tracking database to the volatile memory device(s) in the NVDIMM-N subsystem. The NVDIMM-N subsystem then copies at least some of the data and the cache tracking database from the volatile memory device(s) to the non-volatile memory device(s) prior to shutdown. The data and the cache tracking database may then be retrieved from non-volatile memory device(s) when the system is restored.