NVDIMM Warm Boot Attack Mitigation via Handshake and Locking
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Solution Overview
Problem
Warm boot attacks on non-volatile memory modules allow attackers to access and corrupt memory contents by maintaining the module in a self-refresh state and providing external power, bypassing existing security measures like memory encryption and integrity protection.
Innovation Solution
Implementing a CPU-NVDIMM handshake using nonces, locking NVDIMM regions during transitions to low-power states, and modifying the NVDIMM driver to prevent entry into S3 system power state, combined with encryption and integrity protection techniques, to prevent unauthorized access and data corruption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If memory module is placed in self-refresh state during low-power system state, then memory contents are preserved, but attacker can provide external power to maintain self-refresh state and steal memory contents
Solution Approach 1:
The system performs preliminary actions by storing a first signature of memory contents before transitioning to low-power state, and a second signature after resume. This preliminary documentation of memory state enables later verification to detect any unauthorized modifications that occurred during the low-power period, preventing attackers from successfully stealing or corrupting memory contents while the system was in self-refresh state.
Solution Approach 2:
The system implements feedback by comparing the first signature (taken before low-power transition) with the second signature (taken after resume). This feedback mechanism detects whether memory contents were modified during the low-power state, allowing the system to identify and respond to potential warm boot attacks by attackers who attempted to access memory while the system was in self-refresh state.
2Reliability
If memory encryption and integrity protection are used, then memory security is improved, but attacker can still access memory by maintaining self-refresh state with external power
Solution Approach 1:
The system introduces an intermediary verification mechanism using cryptographic signatures. Instead of relying solely on encryption and integrity protection, the system uses signatures as an intermediary layer that verifies whether memory contents remain unchanged. This intermediary check detects attacks even when encryption is present, as the signature comparison reveals any unauthorized access or modification attempts by attackers maintaining self-refresh state with external power.
3Use of energy by moving object
If system transitions to low-power state S3, then energy consumption is reduced, but memory becomes vulnerable to warm boot attacks
Solution Approach 1:
Before transitioning to low-power state S3, the system performs preliminary action by capturing a signature of the memory contents. This preliminary signature serves as a reference for later verification, allowing the system to maintain energy efficiency during S3 state while establishing a baseline for detecting any unauthorized memory access or modification by attackers who might exploit the low-power state for warm boot attacks.
Solution Approach 2:
After resuming from low-power state S3, the system implements feedback by comparing the pre-low-power signature with a post-resume signature. This feedback loop verifies whether memory contents remained intact during the energy-saving period, detecting any warm boot attacks that occurred while the system was in S3 state. This allows the system to maintain both energy efficiency and security by identifying attacks that exploited the low-power transition.
Data Source
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AI summary
Technologies disclosed herein provide mitigations against warm boot attacks on memory modules. For instance, in one embodiment, a non-volatile dual in-line memory module (NVDIMM) in a host computing system may detect a transition from a low-power state to a full-power state, receive a nonce value from a processor of the host computing system after the transition, verify the nonce value, and allow access to data stored on the NVDIMM based on successful verification of the nonce value. In another embodiment, an NVDIMM may be locked in response to detecting a transition from a high-power state to a low-power state in a host computing system. After a transition from the low-power state to the full-power state, the NVDIMM may obtain one or more passphrases, verify the one or more passphrases, and allow access to data stored on the NVDIMM based on successful verification of the one or more passphrases.