Address Scrambling Circuit for Non-Volatile Memory Security

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Solution Overview

Problem

Flash memories face challenges in securing sensitive information stored in non-volatile memory due to sophisticated analysis techniques that can detect location and unauthorized access through hidden channels, such as power consumption and electromagnetic radiation analysis.

Innovation Solution

Implementing an address scrambling method in non-volatile memory that converts logical addresses into physical addresses based on page, word, and block structures, using keys to modify most and least significant bits, ensuring that data and code addresses are scrambled according to specific granularities, thereby preventing unauthorized access and detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If address scrambling is implemented to secure sensitive information, then security against hidden channel attacks is improved, but device complexity increases due to additional scrambling circuitry and address conversion logic

Engineering Contradiction:
ImprovesecurityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

An address scrambling circuit is introduced as an intermediary component between the processing unit and the non-volatile memory. This circuit converts logical addresses into scrambled physical addresses, preventing direct detection of information location while maintaining transparent operations for the processing unit and memory decoder.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The address space is segmented into different levels (page structure, word structure, block structure) with different scrambling functions applied to each level. Data addresses are scrambled according to page structure, code addresses according to word structure, and both according to block structure, allowing targeted security measures at different granularities.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If address scrambling is applied to prevent detection of information location, then resistance to power consumption analysis is improved, but the difficulty of detecting and measuring increases due to sophisticated analysis techniques

Engineering Contradiction:
Improvepower consumption analysisVSAvoiddetection difficulty
Core Design Contradiction:
Object-affected harmful factorsVSDifficulty of detecting and measuring

Solution Approach 1:

The address representation is transformed by changing the parameter mapping between logical and physical address spaces. By applying different scrambling functions to different address levels based on memory structure (page, word, block), the patent creates a complex address transformation that obscures power consumption patterns while maintaining operational transparency.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If different scrambling functions are applied to data and code addresses based on memory structure, then security effectiveness is improved, but device complexity increases due to multiple scrambling functions

Engineering Contradiction:
Improvesecurity effectivenessVSAvoidscrambling circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different scrambling functions are applied locally to different address types based on their specific requirements. Data addresses use one scrambling function optimized for page structure, while code addresses use another function optimized for word structure. Both are further scrambled according to block structure, allowing tailored security measures for different memory contents.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11003595B2Storage in a non-volatile memory
Publication Date: 2021.05.11 STMICROELECTRONICS INT NV
  • US11003595B2 patent drawing
  • US11003595B2 patent drawing
  • US11003595B2 patent drawing

AI summary

A non-volatile memory is organized in pages and has a word writing granularity of one or more bytes and a block erasing granularity of one or more pages. Logical addresses are scrambling into physical addresses used to perform operations in the non-volatile memory. The scrambling includes scrambling logical data addresses based on a page structure of the non-volatile memory and scrambling logical code addresses based on a word structure of the non-volatile memory.