Non-volatile Memory Arithmetic Circuitry for Neural Network Processing

The patent merges the memory device and arithmetic circuitry into a single integrated system. The non-volatile memory device includes both storage cells and arithmetic processing units that can perform neural network operations directly within the memory architecture, eliminating the need for separate memory controllers and enabling parallel processing of multiple operations simultaneously.

The memory device is designed to perform multiple functions: it can store data in non-volatile memory cells and simultaneously perform arithmetic operations for neural network processing. The arithmetic circuitry can handle various operations including multiplication, accumulation, and activation functions, making the memory device a multi-functional component that replaces both memory storage and separate processing units.

The arithmetic circuitry is pre-configured within the memory device structure, with processing units positioned to receive and process data as it is being retrieved from memory cells. This preliminary arrangement of processing components enables immediate computation on retrieved data without requiring additional data movement or separate processing stages.

The patent transitions from a sequential processing model (retrieve data then process) to a parallel processing model by adding the arithmetic dimension within the memory architecture. Multiple arithmetic operations can be performed simultaneously across different memory blocks, effectively utilizing the third dimension of parallelism in the memory structure to achieve concurrent data retrieval and processing.