NVM Set Backend Logic Power Management
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Solution Overview
Problem
The implementation of NVM Sets in data storage devices, as defined by the NVMe standard, leads to higher power consumption due to the need for duplications of backend logic circuitry to support quality of service and performance requirements, which is not present in traditional SSDs.
Innovation Solution
Incorporating power management circuitry that initializes backend logic circuitry to a high power state, detects idle states, stores operational settings, and transitions the circuitry to a low power state when idle, thereby reducing power consumption without affecting performance or quality of service.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If backend logic circuitry is duplicated to support multiple NVM sets, then quality of service and performance requirements are met, but power consumption increases
Solution Approach 1:
The patent implements dynamic power management by transitioning backend logic circuitry between active and idle states based on workload demands. The power management circuitry monitors activity levels and dynamically adjusts the operational state of backend logic circuits, allowing the system to adapt its power consumption to actual usage patterns while maintaining service quality when needed.
Solution Approach 2:
The patent applies different power states to different backend logic circuits based on their individual activity levels. Instead of uniformly managing power across all circuits, the system independently controls each backend logic circuit's power state, allowing idle circuits to enter low-power mode while active circuits maintain full performance, thus resolving the contradiction between reliability and energy use.
2Use of energy by moving object
If backend logic circuitry is transitioned to low power state, then power consumption is reduced, but performance restoration time increases
Solution Approach 1:
The patent maintains operational settings and configuration data in memory even when backend logic circuitry transitions to idle state. This preliminary preservation of operational context allows for rapid state restoration without requiring full reinitialization, thereby reducing the time penalty associated with power state transitions while still achieving power savings.
3Productivity
If multiple backend logic circuits are maintained in high power state, then performance is maintained, but power consumption increases
Solution Approach 1:
The patent implements partial action by maintaining only the necessary number of backend logic circuits in high-performance state based on actual workload requirements. When multiple NVM sets are present but not all are actively being accessed, the system activates only the required subset of backend circuits, avoiding the excessive power consumption that would result from keeping all circuits continuously active.
Data Source
AI summary
Methods and apparatus for managing power in data storage devices implementing non-volatile memory (NVM) sets are provided. One such apparatus includes a NVM including a first NVM set and a second NVM set, first backend logic circuitry configured to manage data storage in the first NVM set, second backend logic circuitry configured to manage data storage in the second NVM set, and power management circuitry configured to initialize the first and second backend logic circuitry to a high power state, detect an idle state for the first NVM set, store operational settings for the first backend logic circuitry, and transition the first backend logic circuitry to a low power state that consumes less power than the high power state. When a new command arrives, the first backend logic circuitry can be returned to the high power state to handle the command.