Non-Volatile Memory Balance Cycle for Host Write Speed Variation

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Solution Overview

Problem

Non-volatile memory systems face challenges in managing programming schedules to minimize the impact on responsiveness to host commands, particularly in maintaining sufficient free blocks for efficient data writes and storage, especially when using a combination of SLC and MLC flash memory.

Innovation Solution

The implementation of a balance cycle that interleaves foreground maintenance operations with host data writes, adjusting interleave ratios based on valid data amounts to optimize free space creation and consumption, and dynamically selecting blocks for maintenance operations to maintain performance and storage efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If foreground maintenance operations are performed to generate free blocks, then storage system responsiveness is improved, but host data write speed varies and performance deteriorates

Engineering Contradiction:
Improvestorage system responsivenessVSAvoidhost data write speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts the interleave ratio between maintenance operations and host writes based on the current amount of valid data in previously programmed blocks. When valid data amount is high, the ratio favors maintenance operations; when valid data amount is low, the ratio favors host writes. This dynamic adjustment optimizes both responsiveness and write speed throughout the balance cycle.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements periodic balance cycles that alternate between phases of maintenance operations and host writes. Each balance cycle consists of multiple schedule cycles with predetermined interleave ratios, creating a periodic pattern that systematically manages free block generation while maintaining acceptable host write performance over time.

Inventive Principle:
Principle #19Periodic action

2Quantity of substance

If interleave ratio of maintenance writes to host writes is increased, then free space creation is improved, but host write performance deteriorates

Engineering Contradiction:
Improvefree spaceVSAvoidhost write performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The interleave ratio is made dynamic rather than fixed, changing at predetermined scheduling points based on the current valid data amount. This allows the system to allocate more resources to free space creation when necessary while preserving host write performance when valid data is low, resolving the contradiction between free space generation and write performance.

Inventive Principle:
Principle #15Dynamics

3Productivity

If balance cycle of maintenance operations is implemented, then storage efficiency is improved, but complexity of managing programming schedules increases

Engineering Contradiction:
Improvestorage efficiencyVSAvoidcomplexity of managing programming schedules
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The maintenance operation management is segmented into discrete balance cycles, each consisting of multiple schedule cycles with predetermined interleave ratios. This segmentation breaks down the complex scheduling task into manageable, repeating units that are easier to implement and control while maintaining storage efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the parameter of interleave ratio at predetermined scheduling points based on valid data amounts. This parameter change approach allows the system to adapt to different storage conditions without requiring complex real-time decision-making, simplifying the overall scheduling management while maintaining efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10120613B2System and method for rescheduling host and maintenance operations in a non-volatile memory
Publication Date: 2018.11.06 SANDISK TECHNOLOGIES LLC
  • US10120613B2 patent drawing
  • US10120613B2 patent drawing
  • US10120613B2 patent drawing

AI summary

Systems and methods for balancing maintenance and programming host data across multiple maintenance source blocks in a non-volatile memory are disclosed. A memory system may include non-volatile memory and a controller configured to execute one or more of the steps of selecting a fixed plurality of maintenance source blocks for executing a balance cycle of maintenance and host writes across the selected fixed plurality of maintenance source blocks. The method interleaves moving of valid data from source blocks with host data writes to achieve a balance of free space generation and consumption for the balance cycle, while periodically reevaluating an overall interleave ratio and/or substituting other previously programmed blocks for one of the previously selected plurality during the balance cycle.