Non-Volatile Memory Bit Line Voltage Optimization
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Solution Overview
Problem
Non-volatile memory devices, such as 3D NAND flash memory, face challenges in achieving uniform threshold voltage distribution due to manufacturing process variations, leading to reliability and performance issues.
Innovation Solution
An operating method for non-volatile memory devices that involves applying multiple program voltage signals and measuring threshold voltages to determine an enhanced bit line voltage, which is used to improve the uniformity of threshold voltage distribution by adjusting the bit line voltage based on measured voltage differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the same bit line voltage is applied to memory cells of different dice in the same wafer, then the manufacturing process is simple, but the threshold voltage distribution becomes non-uniform due to manufacturing process variations
Solution Approach 1:
The patent applies different bit line voltage values to different dice within the same wafer based on their specific manufacturing characteristics. Each die receives a customized voltage that compensates for its unique process variations, thereby achieving uniform threshold voltage distribution across all dice while maintaining manufacturing simplicity through an automated voltage selection process.
Solution Approach 2:
The patent changes the bit line voltage parameter dynamically based on the die identifier and manufacturing process data. By adjusting the voltage value for each die, the system compensates for manufacturing variations and achieves consistent threshold voltage distribution across different dice without requiring complex manual calibration.
2Manufacturing precision
If multiple verification steps are implemented to narrow threshold voltage distribution, then the threshold voltage uniformity improves, but the programming time and process complexity increase
Solution Approach 1:
The patent performs preliminary characterization of each die's manufacturing process parameters before the actual programming operation. By pre-determining the optimal bit line voltage for each die based on its manufacturing data, the system eliminates the need for multiple verification steps during programming, thereby reducing programming time while maintaining tight threshold voltage distribution.
Solution Approach 2:
The patent uses manufacturing process data as feedback to determine the appropriate bit line voltage for each die. This feedback mechanism allows the system to pre-compensate for process variations, achieving narrow threshold voltage distribution in a single programming pass without requiring iterative verification steps.
Data Source
AI summary
An operating method and a non-volatile memory device are provided. The non-volatile memory device includes a memory array including a plurality of memory cells. The operating method includes applying a first program voltage signal to selected word lines connected to selected memory cells during a first program period and measuring a first threshold voltage, applying a second program voltage signal to the selected word lines during a second program period and measuring a second threshold voltage, applying a test bit line voltage signal to selected bit lines and applying a third program voltage signal to the selected word lines during a third program period and measuring a third threshold voltage and determining the enhanced bit line voltage by comparing a difference between the third threshold voltage and the second threshold voltage with a difference between the second threshold voltage and the first threshold voltage.