Non-Volatile Memory Cell Bulk Reset During Power Transitions
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Solution Overview
Problem
Volatile memory systems, like DRAM, require continuous power to maintain data, while non-volatile memory systems pose security risks due to data retention after power off, leading to challenges in replacing volatile memory without compromising security.
Innovation Solution
A memory system performs a bulk reset on non-volatile memory cells by applying a write pulse during power state transitions, driving digit lines to a first voltage, plate lines to a second voltage, and word lines to a third voltage, effectively disturbing the logic state of previously written data to mitigate security risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If non-volatile memory is used to replace volatile memory, then data retention after power off is improved, but security risks worsen due to data being accessible after power removal
Solution Approach 1:
The system performs a bulk reset operation on non-volatile memory cells before transitioning to a low-power or off state. This preliminary action disturbs the logic state of previously written data by applying specific voltage patterns to digit lines, plate lines, and word lines, ensuring that no valid data remains accessible after power removal, thus eliminating the security vulnerability while preserving the non-volatile storage capability
Solution Approach 2:
The system intentionally discards previously stored data by applying a bulk reset operation that disturbs the logic state of memory cells. This controlled data destruction is performed automatically during power state transitions, allowing the system to recover a clean slate for future data storage while maintaining the security benefit of data unavailability during power-off states
2Object-affected harmful factors
If volatile memory is used, then security is improved by data loss on power off, but data retention capability worsens
Solution Approach 1:
The memory system incorporates an automatic bulk reset mechanism that activates during power state transitions without requiring external intervention. The memory controller automatically detects the power transition and executes the reset sequence, applying appropriate voltage patterns to disturb logic states in non-volatile memory cells, thereby self-managing the security protocol and eliminating the need for additional security hardware or software layers
Data Source
AI summary
Methods, systems, and devices for cell data bulk reset are described. In some examples, a write pulse may be applied to one or more memory cells based on an associated memory device transitioning power states. To apply the wire pulse, a first subset of digit lines may be driven to a first voltage and a plate may be driven to a second voltage or a third voltage. While the digit lines and plate are driven to the respective voltages, one or more word lines may be driven to the second voltage or the third voltage. In some instances, the digit lines may be selected (e.g., driven) according to a pattern.