Non-volatile Memory Pass/Fail Check Circuit Skipping Logic
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Solution Overview
Problem
Conventional non-volatile memory devices require additional operating time due to sequential pass/fail check operations on multiple buffer groups, even after a failure is detected in one region, leading to inefficiencies in programming time.
Innovation Solution
A non-volatile memory device and method that perform a pass/fail check operation on multiple page buffer groups sequentially and skip further checks if any group is determined to be a fail, utilizing a pass/fail check circuit and control circuit to stop the operation on remaining groups when a fail signal is detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pass/fail check operation is performed sequentially on all page buffer groups, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent extracts the unnecessary pass/fail check operations from the sequential process. When a fail is detected in one page buffer group, the remaining unchecked groups are extracted from the operation sequence and skipped, eliminating wasted time while preserving the accuracy of the final determination through the OR logic combination of fail signals.
2Reliability
If pass/fail check operation continues on all buffer groups, then reliability is improved, but productivity decreases
Solution Approach 1:
The patent applies dynamics by making the pass/fail check process adaptive rather than static. The control circuit dynamically adjusts the operation flow based on real-time fail signals from the pass/fail check circuit. When a fail is detected, the system dynamically skips remaining checks; when no fail is detected, all groups are checked. This dynamic approach maintains reliability while improving productivity.
3Measurement precision
If sequential pass/fail check is performed on multiple page buffer groups, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent implements skipping by allowing the pass/fail check operation to rush through the remaining page buffer groups when a fail is already detected. The control circuit receives fail signals from the pass/fail check circuit and uses OR logic to determine that further checks are unnecessary, skipping the remaining groups and rapidly completing the program verification process.
Data Source
AI summary
A non-volatile memory device includes a memory cell block including a plurality of memory cells, a plurality of page buffer groups including a plurality of page buffers coupled to bit lines of the memory cell block, a pass/fail check circuit coupled to the plurality of page buffers and configured to perform a pass/fail check operation of comparing a total amount of current varying according to verify data sensed from the memory cells and stored in the page buffers with an amount of reference current corresponding to the number of allowed bits, and a control circuit configured to control the pass/fail check circuit by stopping, when a fail signal is generated during the pass/fail check operation currently being performed on a page buffer group among the plurality of page buffer groups, the pass/fail check operation on the remaining page buffer groups.