NVM Code Rate Adjustment for Cross-Temperature Error Control

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Solution Overview

Problem

Current non-volatile memory (NVM) devices, such as 3D NAND flash memory, experience significant reliability and data transfer performance degradation due to cross-temperature differentials, which lead to increased bit error rates as a result of temperature variations during programming and reading operations.

Innovation Solution

A method and apparatus that measure and track temperature differentials and error rates in NVM cells, adjusting the code rate to maintain a selected error rate by using a code word management circuit to adjust the ratio of code bits to user data bits based on the cross-temperature differential, thereby compensating for temperature sensitivity across the memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If data are programmed and read at different temperatures, then the memory device can operate in varying thermal environments, but cross-temperature differentials cause increased bit error rates and reliability degradation

Engineering Contradiction:
Improvetemperature environment adaptabilityVSAvoiddata retrieval reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent dynamically adjusts the code rate (a key parameter of the error correction code) based on the measured cross-temperature differential. When the temperature difference between programming and reading operations exceeds a threshold, the system increases the code rate to provide stronger error correction capability, thereby maintaining reliability across varying temperature conditions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements a feedback mechanism where the code rate management circuit continuously monitors the cross-temperature differential and adjusts the code rate accordingly. This closed-loop control ensures that the error correction strength adapts to the actual thermal conditions, optimizing both reliability and storage efficiency.

Inventive Principle:
Principle #23Feedback

2Device complexity

If a fixed code rate is used for all temperature conditions, then the device complexity is reduced, but error rate performance degrades under varying temperature conditions

Engineering Contradiction:
Improvecode rate management complexityVSAvoiderror rate performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent transitions from a static fixed code rate approach to a dynamic adaptive code rate system. The code rate is no longer fixed but varies dynamically based on the cross-temperature differential, allowing the system to optimize error correction strength for each specific thermal condition while maintaining manageable complexity through automated adjustment.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the code rate is increased to compensate for temperature effects, then error correction capability improves, but storage efficiency decreases due to higher ratio of code bits to user data bits

Engineering Contradiction:
Improveerror correction capabilityVSAvoidstorage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts the code rate parameter based on actual temperature conditions rather than using a consistently high code rate. This allows the system to maintain strong error correction capability only when temperature differentials exceed the threshold, thereby preserving storage efficiency during normal operating conditions while ensuring reliability when needed.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10956064B2Adjusting code rates to mitigate cross-temperature effects in a non-volatile memory (NVM)
Publication Date: 2021.03.23 SEAGATE TECH LLC
  • US10956064B2 patent drawing
  • US10956064B2 patent drawing
  • US10956064B2 patent drawing

AI summary

Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). A circuit measures programming and reading temperatures for a set of memory cells in the NVM. Error rates are determined for each of the reading operations carried out upon the data stored in the memory cells. A code rate for the NVM is adjusted to maintain a selected error rate for the memory cells. The code rate is adjusted in relation to a cross-temperature differential (CTD) value exceeding a selected threshold. The code rate can include an inner code rate as a ratio of user data bits to the total number of user data bits and error correction code (ECC) bits in each code word written to the NVM, and/or an outer code rate as a strength or size of a parity value used to protect multiple code words.