Non-Volatile Memory Operation Collision Handling

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Solution Overview

Problem

Memory subsystems face performance issues due to operation collisions, where in-flight operations targeting the same address can result in erroneous data or reduced performance, as they either block operations or return incorrect data, leading to inefficiencies and reduced data integrity.

Innovation Solution

A coherency checker component is implemented to detect and manage operation collisions by maintaining data structures that track the latest in-flight operations, allowing colliding operations to proceed without blocking, ensuring write operations supersede previous writes, read operations use in-flight write data, and chaining read operations for efficient media access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If operation collisions are handled by blocking operations, then data integrity is maintained, but performance is reduced due to blocked operations

Engineering Contradiction:
Improvedata integrityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a coherency checker component as an intermediary that monitors and manages operation collisions. This component maintains data structures tracking in-flight operations and determines whether collisions occur, allowing the system to selectively handle collisions based on their nature rather than universally blocking all operations, thus maintaining data integrity while improving performance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system changes the handling parameter from binary blocking to conditional processing based on operation type. By detecting whether colliding operations are read or write operations, the system applies different handling strategies: write operations supersede previous writes while read operations can proceed using in-flight write data, optimizing performance while maintaining data integrity

Inventive Principle:
Principle #35Parameter changes

2Productivity

If operation collisions are ignored, then performance is improved by avoiding blocked operations, but erroneous data is returned

Engineering Contradiction:
ImproveperformanceVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The coherency checker implements a feedback mechanism that continuously monitors in-flight operations and detects collisions in real-time. This feedback allows the system to identify collision conditions and apply appropriate handling logic, ensuring that performance optimizations do not compromise data integrity by returning erroneous data

Inventive Principle:
Principle #23Feedback

3Measurement precision

If data structures are maintained to track in-flight operations, then operation collisions are detected accurately, but device complexity increases

Engineering Contradiction:
Improvecollision detection accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the collision detection function into a dedicated coherency checker component separate from the main memory subsystem. This component maintains specialized data structures for tracking in-flight operations, isolating the complexity of collision detection from the core memory operations while achieving accurate detection

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11481348B2Handling operation collisions in a non-volatile memory
Publication Date: 2022.10.25 MICRON TECHNOLOGY INC
  • US11481348B2 patent drawing
  • US11481348B2 patent drawing
  • US11481348B2 patent drawing

AI summary

A first operation identifier is assigned to a current operation directed to a memory component, the first operation identifier having a first entry in a first data structure that associates the first operation identifier with a first buffer identifier. It is determined whether the current operation collides with a prior operation assigned a second operation identifier, the second operation identifier having a second entry in the first data structure that associates the second operation identifier with a second buffer identifier. A latest flag is updated to indicate that the first entry is a latest operation directed to an address (1) in response to determining that the current operation collides with the prior operation and that the current and prior operations are read operations, or (2) in response to determining to determining that the current operation does not collide with a prior operation.