NVM Controller Command Decoder Index Mapping

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Solution Overview

Problem

Existing nonvolatile memory (NVM) controllers face challenges in rapidly recognizing and responding to commands from hosts while effectively managing error corrections and memory operations in NAND flash memory devices.

Innovation Solution

An NVM controller with a command decoder that outputs an index to access a program memory containing a command mapping table, allowing the processor to perform operations based on the received commands, including error handling, using a queue-like memory structure for address and index management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a traditional command processing structure is used in the NVM controller, then the device complexity is reduced, but the command recognition and execution speed decreases

Engineering Contradiction:

Improvecommand recognition and execution speedVSAvoidcontroller structure complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The command mapping table is pre-configured in the program memory with all command-index-address mappings before operation. When a command is received, the command decoder immediately generates an index that directly maps to the corresponding program address, eliminating the need for real-time command parsing and program search, thus achieving rapid command execution

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The command mapping table acts as an intermediary data structure between the command decoder and the processor. It translates human-readable commands into machine-executable program addresses through index values, enabling fast indirect access to the appropriate error handling or execution programs without complex conditional logic

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If detailed error handling programs are implemented, then the reliability is improved, but the device complexity increases

Engineering Contradiction:

Improveerror handling capabilityVSAvoidprogram structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Error handling is segmented into distinct programs stored at different addresses in the program memory. Each error type (syntax errors, runtime errors, hardware errors) has its dedicated error handling program. The command mapping table segments the address space to directly route different error conditions to appropriate handling routines, making the system reliable while maintaining manageable complexity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Multiple copies of error handling programs are stored in the program memory, each accessible through different addresses in the command mapping table. This allows the same error handling logic to be reused across different command contexts while maintaining organized, modular program structures that are easy to maintain and update

Inventive Principle:

Principle #26Copying

Data Source

PatentUS9158676B2Nonvolatile memory controller and a nonvolatile memory system

Publication Date: 2015.10.13 SAMSUNG ELECTRONICS CO LTD

AI summary

A nonvolatile memory (NVM) controller that includes a command decoder that receives a command from a host and outputs an index in response to the command, a program memory that stores a command mapping table including address information for accessing a program corresponding to the command and a processor that receives an index from the command decoder and controls the address information to be output in response to the index.