Non-Volatile Memory Controller Dual Address Table Segmentation

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in optimizing the operating speed of internal RAM while minimizing size, particularly in non-volatile memory systems where address conversion and data management are complex and resource-intensive.

Innovation Solution

A controller is designed with a dual memory area architecture, where a first memory area exclusively stores critical address tables for fast access and a second shared memory area stores less critical address maps, allowing for efficient conversion of sector addresses to physical addresses using address conversion blocks that load maps in units of small and large chunks, optimizing RAM usage and operating speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a single shared memory area is used for storing address tables, then memory size is reduced, but address conversion speed and reliability deteriorate due to access conflicts and lower priority for critical operations

Engineering Contradiction:
Improvememory sizeVSAvoidaddress conversion speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The memory area is segmented into a first memory area exclusively for storing first address tables (critical for hot data) and a second memory area shared for storing second address tables (for cold data). This segmentation allows critical address conversion operations to access dedicated memory space without interference from other functions, ensuring high speed and reliability for frequently accessed data while still utilizing limited memory resources efficiently.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If a single shared memory area is used for storing address tables, then manufacturing cost is reduced, but operating reliability deteriorates due to lack of guaranteed access for critical operations

Engineering Contradiction:
Improvemanufacturing costVSAvoidoperating reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The memory is divided into dedicated first memory area and shared second memory area, ensuring that critical address tables for hot data have guaranteed access space. This segmentation provides reliability guarantees for time-sensitive operations while still using a unified memory structure that is cost-effective to manufacture compared to completely separate memory systems.

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If address tables are loaded in large chunks, then memory usage efficiency is improved, but access time for specific address entries increases

Engineering Contradiction:
Improvememory usage efficiencyVSAvoidaccess time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

Address tables are segmented into first address tables for hot data (frequently accessed) and second address tables for cold data (infrequently accessed). The first address tables are loaded into the dedicated first memory area for rapid access, while the second address tables are loaded into the shared second memory area. This segmentation strategy loads only the necessary portion of address tables into high-speed memory, reducing overall memory usage while maintaining fast access times for critical operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different quality levels of memory access are assigned to different address tables based on their access patterns. The first address tables (hot data) are stored in the dedicated first memory area with high access priority and speed, while the second address tables (cold data) are stored in the shared second memory area with lower access priority. This local quality differentiation ensures that frequently accessed address entries are available quickly without requiring the entire address table to be loaded into high-speed memory.

Inventive Principle:
Principle #3Local quality

4Loss of time

If address tables are loaded in small chunks, then access time for specific entries is reduced, but memory management complexity and overhead increase

Engineering Contradiction:
Improveaccess timeVSAvoidmemory management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The address tables are segmented into first and second address tables based on data access patterns (hot vs. cold data). This segmentation provides a clear, manageable structure where the first address table is maintained in the dedicated first memory area for fast access, and the second address table is maintained in the shared second memory area. The segmentation approach balances access speed with management simplicity by creating distinct categories with clear storage locations, avoiding the need for complex dynamic memory management while still enabling fast access to critical address entries.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9465747B2Controller for controlling non-volatile memory and semiconductor device including the same
Publication Date: 2016.10.11 SK HYNIX INC
  • US9465747B2 patent drawing
  • US9465747B2 patent drawing
  • US9465747B2 patent drawing

AI summary

A controller controlling a non-volatile memory includes a first memory area suitable for storing a first address table, a second memory area suitable for storing a second address table, an address conversion block suitable for converting a sector address received from a host into a physical address corresponding to the non-volatile memory with reference to the first and second address tables, and one or more function blocks suitable for sharing the second memory area with the address conversion block. The address conversion block exclusively uses the first memory area.