NVM Controller Hot Data Classification via Lookup Table

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Solution Overview

Problem

Flash memory storage devices face high write amplification due to mixing hot and cold data, which affects performance and durability, necessitating effective identification of hot data addresses to manage data update and storage endurance.

Innovation Solution

A non-volatile memory apparatus with a controller using a data look-up table to classify logical addresses based on counter values and timer values, determining whether a write command's address is a hot data address to optimize data placement and reduce write amplification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If hot data and cold data are written into the same memory in mixture, then the memory structure is simple, but write amplification increases and performance deteriorates

Engineering Contradiction:
Improvememory structureVSAvoidwrite amplification
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments data into hot data and cold data based on access patterns, and writes them into different memory regions or blocks. The controller classifies incoming write data by tracking access frequencies and separates hot data (frequently accessed) from cold data (infrequently accessed), storing them in different locations to optimize write amplification and garbage collection efficiency.

Inventive Principle:
Principle #1Segmentation

2Productivity

If hot data and cold data are separated into different memory regions, then write amplification is reduced, but the controller complexity increases

Engineering Contradiction:
Improvewrite amplificationVSAvoidcontroller structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The controller performs preliminary classification of data as hot or cold before writing into memory, using access frequency tracking and timing mechanisms. By pre-classifying data based on write patterns and access intervals, the controller determines appropriate memory regions in advance, avoiding complex real-time decisions during write operations and garbage collection.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If data access frequency is tracked for every logical address, then hot data identification accuracy is improved, but memory resources for tracking are consumed

Engineering Contradiction:
Improvehot data identification accuracyVSAvoidmemory resources
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent applies different tracking granularities to different data regions or address ranges. Instead of uniformly tracking every logical address with equal detail, the system adjusts tracking intensity based on local access patterns, focusing resources on regions with significant hot/cold data differentiation while reducing overhead in regions with uniform access characteristics.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10733107B2Non-volatile memory apparatus and address classification method thereof
Publication Date: 2020.08.04 VIA TECH INC
  • US10733107B2 patent drawing
  • US10733107B2 patent drawing
  • US10733107B2 patent drawing

AI summary

A non-volatile memory (NVM) apparatus and an address classification method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller accesses the NVM in accordance with a write command of a host. The controller may perform the address classification method. The address classification method includes: providing a data look-up table, wherein the data look-up table includes a plurality of data entries, each of the data entries includes a logical address information, a counter value and a timer value; searching the data look-up table based on the logical address of the write command in order to obtain a corresponding counter value and a corresponding timer value; and determining whether the logical address of the write command is a hot data address based on the corresponding counter value and the corresponding timer value.