Non-Volatile Memory Controller Mapping Format for Flash Fragmentation

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Solution Overview

Problem

Current non-volatile memory control techniques face challenges in efficiently managing large-sized data storage devices, particularly in flash memory systems, where garbage collection leads to logical fragmentation and inefficient use of storage space due to the lack of effective mapping information formats that do not reserve pattern mode bits.

Innovation Solution

A data storage device architecture that includes a controller which caches write data in a temporary storage and programs it to non-volatile memory using a mapping information format that eliminates pattern mode bits, utilizing threshold values to differentiate between temporary storage and non-volatile memory addresses, and manages mapping information history to optimize data placement and reduce fragmentation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If pattern mode bits are reserved in the mapping information format, then the system can differentiate between temporary storage and non-volatile memory, but the storage efficiency decreases and fragmentation increases

Engineering Contradiction:
Improveaddress differentiationVSAvoidstorage efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent changes the parameter representation method by using threshold-based value comparison instead of reserved pattern mode bits. The mapping information uses numerical values where values less than a first threshold indicate temporary storage and values greater than or equal to the threshold indicate non-volatile memory, eliminating the need for dedicated pattern mode bits and improving storage efficiency

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If mapping information format reserves pattern mode bits, then temporary storage and non-volatile memory can be distinguished, but the storage capacity utilization decreases

Engineering Contradiction:
Improvememory type identificationVSAvoidstorage capacity utilization
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent transforms the memory type identification mechanism from using reserved pattern mode bits to using threshold-based numerical value comparison. This allows the full bit width of the mapping information to be utilized for addressing, maximizing storage capacity utilization while maintaining the ability to distinguish between temporary storage and non-volatile memory

Inventive Principle:
Principle #35Parameter changes

3Reliability

If garbage collection is performed in flash memory systems, then data retention is improved, but logical fragmentation increases due to ineffective mapping information management

Engineering Contradiction:
Improvedata retentionVSAvoidlogical fragmentation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the address space into two distinct ranges separated by a threshold value, with lower values representing temporary storage and higher values representing non-volatile memory. This segmentation allows the controller to efficiently manage different storage media types and reduces logical fragmentation by providing clear address space separation for garbage collection operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The threshold value acts as an intermediary that mediates between temporary storage and non-volatile memory address spaces. This intermediary threshold enables the mapping information to clearly distinguish between the two storage types, facilitating effective garbage collection and reducing logical fragmentation in flash memory systems

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11392489B2Data storage device and non-volatile memory control method
Publication Date: 2022.07.19 SILICON MOTION INC
  • US11392489B2 patent drawing
  • US11392489B2 patent drawing
  • US11392489B2 patent drawing

AI summary

Mapping information management for data storage devices is provided. A controller caches write data issued by a host in a temporary storage and then programs the cached write data from the temporary storage to a non-volatile memory. The controller uses a mapping information format to manage mapping information of logical addresses recognized by the host. As presented in the mapping information format, the values not greater than a first threshold value and mapped to the configuration information storage space of the non-volatile memory are at least partially used to point to the temporary storage, and the values greater than the first threshold value are mapped to the non-volatile memory.