Non-Volatile Memory Controller Power Adaptation

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Solution Overview

Problem

The stability of rewritable non-volatile memory storage apparatuses is compromised due to insufficient power supplied by data transmission interfaces when multiple memory dies are enabled simultaneously, leading to reduced performance and reliability.

Innovation Solution

A data writing method that determines whether the host system's data transmission interface complies with a first or second interface standard, using a general mode or power saving modes to limit the number of enabled memory dies and adjust operation frequencies accordingly, ensuring stable operation even with limited power supply.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple memory dies are enabled simultaneously to increase writing speed, then productivity is improved, but power consumption increases beyond the capability of the data transmission interface

Engineering Contradiction:

Improvewriting speedVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent dynamically adjusts the number of memory dies enabled simultaneously based on the power supply capability of the data transmission interface. The controller monitors power availability and adapts the parallel operation count of memory dies accordingly, transitioning between different operational states to balance speed and power consumption.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the memory system by adjusting the number of active memory dies based on interface power standards. When a high-power interface is detected, more memory dies are activated; when a low-power interface is detected, fewer memory dies are activated, thus optimizing the balance between writing speed and power consumption.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If multiple memory dies are enabled simultaneously to shorten data writing time, then productivity is improved, but stability deteriorates due to insufficient power supply

Engineering Contradiction:

Improvedata writing timeVSAvoidstability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The system dynamically adjusts the number of simultaneously enabled memory dies based on the detected power supply capability of the data transmission interface. This dynamic adaptation ensures that the system operates within safe power limits while maximizing writing speed, thereby maintaining stability even when multiple memory dies are in use.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The controller implements a feedback mechanism by detecting the data transmission interface standard and using this information to determine the appropriate number of memory dies to enable. This feedback loop ensures that the system configuration always matches the available power supply capacity, preventing instability caused by power deficiency.

Inventive Principle:

Principle #23Feedback

3Reliability

If the number of enabled memory dies is limited to reduce power consumption, then reliability is improved, but productivity decreases

Engineering Contradiction:

ImprovestabilityVSAvoidwriting speed

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent employs dynamic adjustment of the number of enabled memory dies based on the power supply capability of the connected data transmission interface. When a high-power interface is detected, the system enables more memory dies to maintain high writing speed; when a low-power interface is detected, it limits the number of enabled dies to ensure stable operation, thus optimizing the balance between reliability and productivity.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter of the number of active memory dies according to the detected interface standard. This parameter adjustment allows the system to achieve high productivity when power is abundant while ensuring reliability when power is limited, effectively resolving the trade-off between these two factors.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8595523B2Data writing method for non-volatile memory, and controller and storage system using the same

Publication Date: 2013.11.26 PHISON ELECTRONICS

AI summary

A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.