Non-Volatile Memory Controller Error Detection and Word Line Skipping
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Solution Overview
Problem
Current storage devices lack early detection capabilities for identifying at-risk locations during read operations, which can lead to data errors and inefficient use of storage blocks, as they often require excluding entire blocks due to small errors in a single word line.
Innovation Solution
Implementing a system where a controller determines an error indicator value for read data from non-volatile memory, comparing it to a threshold to identify at-risk word lines or sectors, and skips these during future write operations by modifying the logical address to physical address mapping and updating metadata, allowing for individual word lines or sectors to be skipped rather than entire blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection is performed using traditional EPWR operations, then error correction capability is provided, but early detection of at-risk locations is not achieved
Solution Approach 1:
The patent performs read operations and error detection before the memory block is fully programmed or before write operations commence. The controller reads data from the memory block, determines error indicator values, and identifies at-risk word lines or sectors in advance, allowing preventive actions to be taken before actual data loss occurs.
Solution Approach 2:
The system continuously monitors error indicator values during read operations and uses this feedback to dynamically identify at-risk locations. The controller compares error indicator values against thresholds and adjusts the mapping of logical addresses to physical locations based on the detected error conditions, creating a closed-loop error management system.
2Reliability
If entire blocks are excluded due to errors in a single word line, then data integrity is maintained, but storage capacity is wasted
Solution Approach 1:
The patent divides the memory block into smaller addressable units (word lines or sectors) and applies error detection and skipping operations at this granular level. Instead of treating the entire block as a single unit, the controller can identify and skip only the specific word lines or sectors containing errors, leaving the rest of the block available for use.
Solution Approach 2:
The error detection and skipping mechanism applies different treatment to different regions of the memory block based on their actual condition. Word lines or sectors with error indicator values below the threshold are marked as available for writing, while those exceeding the threshold are marked to be skipped, creating a non-uniform quality distribution across the block that optimizes storage utilization.
3Reliability
If at-risk word lines are identified and skipped during write operations, then data errors are prevented, but write operation complexity increases
Solution Approach 1:
The controller performs error detection and identifies at-risk word lines or sectors before write operations begin. By determining error indicator values and creating the map of locations to skip in advance, the system prepares the write operation roadmap beforehand, allowing the actual write process to proceed more efficiently without real-time decision-making complexity.
Solution Approach 2:
The patent introduces an intermediary data structure (map or table) that stores the mapping between logical addresses and physical locations, incorporating skip information for at-risk word lines. This intermediary layer absorbs the complexity of error management, allowing the write operation to simply follow the pre-computed mapping without directly handling error detection logic.
Data Source
AI summary
A device includes a non-volatile memory and a controller coupled to the non-volatile memory. The non-volatile memory includes a plurality of blocks and each block of the plurality of blocks includes a plurality of word lines. The controller is configured to receive data read from a word line of a block of the non-volatile memory and to determine an error indicator value based on the data. The controller is further configured to, responsive to the error indicator value satisfying a threshold, indicate that at least a portion of the word line is to be skipped during writing of second data to the block of the non-volatile memory.


