Cross-Temperature Management in Non-Volatile Memory

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Solution Overview

Problem

Current data storage devices, such as solid-state drives (SSDs) using NAND flash memory, face reliability and performance degradation due to cross-temperature effects, which cause increased bit error rates and data transfer issues as a result of temperature differentials between data programming and reading operations.

Innovation Solution

A method and apparatus that include a cross-temperature management control (CTMC) circuit to monitor and adjust read voltage set points proactively, applying preemptive parametric adjustments such as read voltage calibration, incremental adjustments, or forced garbage collection to mitigate cross-temperature effects independently of read commands, ensuring improved bit error rates and data throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read voltage set points are adjusted reactively after temperature differential effects manifest, then bit error rates can be corrected, but data throughput and performance are degraded due to delayed correction

Engineering Contradiction:
Improvebit error rateVSAvoiddata throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary temperature monitoring and preemptively adjusts read voltage set points before temperature differentials cause significant bit errors. The CTMC circuit continuously monitors temperature and proactively recalibrates voltage parameters, preventing performance degradation rather than correcting it after the fact.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where temperature measurements are continuously monitored and fed back to the CTMC circuit, which automatically adjusts read voltage set points in response to detected temperature changes, creating a closed-loop control system that maintains optimal read parameters.

Inventive Principle:
Principle #23Feedback

2Reliability

If read voltage calibration is performed frequently to maintain accuracy across temperature changes, then bit error rates are reduced, but device complexity and power consumption increase

Engineering Contradiction:
Improvebit error rateVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The CTMC circuit autonomously monitors temperature conditions and self-manages the calibration process without requiring external intervention or complex host controller involvement. The circuit independently determines when calibration is needed and executes the voltage parameter adjustments, simplifying the overall system architecture.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system dynamically changes read voltage parameters based on detected temperature differentials. By adjusting voltage set points as a function of temperature, the system maintains read accuracy across varying thermal conditions without requiring complex structural modifications or additional hardware components.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If preemptive parametric adjustments are applied independently of read commands, then data throughput is maintained during temperature transitions, but additional processing overhead is introduced

Engineering Contradiction:
Improvedata throughputVSAvoidprocessing overhead time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs periodic temperature monitoring and conditional calibration at intervals independent of read command timing. This periodic approach allows the system to maintain voltage parameters proactively without interfering with the normal flow of read operations, minimizing impact on data throughput while ensuring temperature-related drift is corrected.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11017864B2Preemptive mitigation of cross-temperature effects in a non-volatile memory (NVM)
Publication Date: 2021.05.25 SEAGATE TECH LLC
  • US11017864B2 patent drawing
  • US11017864B2 patent drawing
  • US11017864B2 patent drawing

AI summary

Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). An initial temperature is stored associated with the programming of data to memory cells in the NVM. A current temperature associated with the NVM is subsequently measured. At such time that a difference interval between the initial and current temperatures exceeds a selected threshold, a preemptive parametric adjustment operation is applied to the NVM. The operation may include a read voltage calibration, a read voltage increment adjustment, and/or a forced garbage collection operation. The operation results in a new set of read voltage set points for the data suitable for the current temperature, and is carried out independently of any pending read commands associated with the data. The initial temperature can be measured during the programming of the data, or measured during the most recent read voltage calibration operation.