Non-Volatile Memory Data Segmentation and Mapping
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Solution Overview
Problem
Non-volatile memory systems face increased storage density leading to higher storage and reading errors, with existing error correction schemes being resource-intensive and not optimized for system performance.
Innovation Solution
Implement a method for reading and writing data across multiple physical memory portions in non-volatile storage devices, using a mapping table to identify and decode data from multiple locations, and adjust error correction formats based on storage capacity and performance metrics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If storage density is increased, then storage capacity is improved, but storage and reading errors increase
Solution Approach 1:
The patent segments data into multiple logical portions that can be distributed across different physical memory portions. Each logical portion is independently managed and can be placed in optimal physical locations, allowing the system to maintain high storage density while reducing errors through distributed storage rather than concentrating all data in single locations.
Solution Approach 2:
The patent applies different error correction formats to different physical memory portions based on their specific characteristics and error profiles. This allows each physical location to receive tailored error correction treatment, optimizing the balance between storage density and reliability for each specific memory region rather than applying uniform correction across the entire storage device.
2Reliability
If high error correction capability is implemented, then reliability is improved, but resource consumption increases
Solution Approach 1:
The system dynamically selects and applies error correction formats tailored to each physical memory portion's actual error characteristics. This localized approach ensures that error correction resources are concentrated only where needed, rather than applying maximum correction capability uniformly across all storage locations, thereby reducing overall resource consumption while maintaining reliability.
Solution Approach 2:
The patent implements dynamic adaptation of error correction schemes based on real-time monitoring of storage and reading errors. The system can adjust error correction formats and intensities according to changing error patterns, allowing the system to use minimal necessary resources for error correction rather than maintaining constant high-level protection, thus optimizing the reliability-resource trade-off.
3Productivity
If error correction schemes are adapted to system performance, then system performance is improved, but device complexity increases
Solution Approach 1:
The patent divides the error correction management into discrete, manageable segments corresponding to individual physical memory portions. Each segment can be independently configured and monitored, making the overall complex system more manageable through modular organization. This segmentation allows performance optimization in each region without requiring complete redesign of the entire error correction scheme.
Solution Approach 2:
The system incorporates feedback mechanisms that monitor storage and reading errors in real-time and use this information to dynamically adjust error correction formats. This feedback-driven adaptation allows the system to automatically optimize performance based on actual conditions, reducing the need for manual configuration and simplifying the management of complex error correction schemes through automated response to performance data.
Data Source
AI summary
The various implementations described herein include systems, methods and/or devices for storing data in a storage device. In one aspect, commands are executed, each command for storing in a storage device a logical group of data comprising one or more logical portions and having a logical address. For each command, in accordance with a determination that a remaining capacity of a first physical memory portion is less than a threshold capacity, data is stored for a head logical portion in a first physical location corresponding to the first physical memory portion. Furthermore, data is stored for a tail logical portion in a second physical location corresponding to a second physical memory portion. Mapping entries are stored in a mapping table, where the mapping entries map the corresponding logical address to at least the first physical location in the storage device.